A7985ATR datasheet(23/44 Pages) STMICROELECTRONICS

23 / 44 page

DocID023128 Rev 5

23/44

A7985A

Application information

In Figure 11 the Bode diagram of the PWM and LC filter transfer function (GPW0 · GLC(f))

and the open loop gain (GLOOP(f) = GPW0 · GLC(f) · GTYPEIII(f)) are drawn.

Figure 11. Open loop gain: module Bode diagram

The guidelines for positioning the poles and the zeroes and for calculating the component

values can be summarized as follows:

Choose a value for R1, usually between 1 k and 5 k.

Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means:

Equation 25

where K is the feed-forward constant and 1/K is equal to 18.

Calculate C4 by placing the zero at 50% of the output filter double pole frequency (fLC):

Equation 26

Calculate C5 by placing the second pole at four times the system bandwidth (BW):

Equation 27

Set also the first pole at four times the system bandwidth and also the second zero at

the output filter double pole:

Equation 28

fLC

---------- KR1



 R

4 fLC



---------------------------

 R

4 C4 4BW



–



--------------------------------------------------------------

4BW



fLC

----------------- 1

–

---------------------------

 R

3 4BW

 

-----------------------------------------



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