HB7121B

Electronics Industries Co., Ltd.

CMOS IMAGE SENSOR

System IC Division

With 8-bit ADC

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume

any responsibility for use of circuits described. NO patent licenses are implied.

DA21991011R_1.0

- 11 -

1999 Hyundai System IC Division

PRELIMINARY

These bits define output pixel data types. For Correlated Double Sampling(CDS), every the

pixel of image sensor are measured twice, reference and data respectively, and reference

values or data values can be read out through pixel data pins selectively using these control

bits. To remove the noise caused by circuit, i.e. Fixed Pattern Noise, the image sensor

performs the CDS in default value. Three output data types are supported as follows.

Bit

Output data type

00

Data level - Reference level

01

Reference level

10

Data level

11

Reserved

This bit offers two types output style about HSYNC signal. HSYNC only mode and HSYNC &

internal clock mode. If the hs_out is set to one, HSYNC output signal is ANDed signal of

internal pixel clock and data valid. Otherwise HSYNC output pin keep data high state during

valid output period. When HSYNC & internal clock mode is set, HSYNC output can be used

as a pixel data output clock.

data valid

MUX

HSYNC

pixel clock

Mode B[3]