HB7121B

Electronics Industries Co., Ltd.

CMOS IMAGE SENSOR

System IC Division

With 8-bit ADC

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume

any responsibility for use of circuits described. NO patent licenses are implied.

DA21991011R_1.0

- 16 -

1999 Hyundai System IC Division

PRELIMINARY

< Pixel Array Structure >

(8) HSYNC Blanking Time Register

(Higher byte

:

Address 20h,

default : 00h,

R/W)

(Lower byte

:

Address 21h,

default : 03h,

R/W)

The HSYNC blanking time defines HSYNC low duration between data valid HSYNC high, pixel unit .

HSYNC low duration is HSYNC blanking time plus twelve in pixel unit for example, default HSYNC

low duration is 15 pixels because register value is 3.

It’ s used to change duration between current line end and next line start.

+1 : dummy area

+1 : interpolation area

+3 : margin for metal 3 slope

+2 : optical block zone

+1 : dummy zone for set of color pattern

pixel array : 400 * 300

total pixel : 416 * 316

B

G

G

B

R

G

- - - -

- - - -

R

G

R

G

G

B

active window area (402 * 302)

accessible address range(414 * 314)