数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ICS1522 数据表(PDF) 12 Page - Integrated Circuit Systems

部件名 ICS1522
功能描述  User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator
PDF  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS1522 数据表(HTML) 12 Page - Integrated Circuit Systems

Back Button ICS1522 Datasheet HTML 5Page - Integrated Circuit Systems ICS1522 Datasheet HTML 6Page - Integrated Circuit Systems ICS1522 Datasheet HTML 7Page - Integrated Circuit Systems ICS1522 Datasheet HTML 8Page - Integrated Circuit Systems ICS1522 Datasheet HTML 9Page - Integrated Circuit Systems ICS1522 Datasheet HTML 10Page - Integrated Circuit Systems ICS1522 Datasheet HTML 11Page - Integrated Circuit Systems ICS1522 Datasheet HTML 12Page - Integrated Circuit Systems ICS1522 Datasheet HTML 13Page - Integrated Circuit Systems  
Zoom Inzoom in Zoom Outzoom out
 12 / 13 page
background image
12
ICS1522
Memory Definition
ICS1522 memory is loaded serially with the least significant bit clocked into the device first. After the R/Wn bit, the next
three bits of the programming word (15 bits) hold the memory location to be loaded. The least significant 11 bits are the
data to be loaded (see Timing Diagram).
MEMORY
ADDRESS
DATA BITS
DEFAULT
VALUES
(HEX)
NAME
DESCRIPTION
000
0-10
04F
F(0:10)
Feedback Divider Modulus (Modulus = Value +1)
001
0-7
03
LO(0:7)
M Counter Lo Sync State
001
8-10
0
A
Don't Care
010
0-7
06
HI(0:7)
M Counter Hi Sync State
010
8-10
0
A
Don't Care
011
0-9
013
R(0:9)
Reference Divider Modulus (Modulus = Value + 1)
011
10
0
REF
POL External Reference Polarity (1 =Invert)
100
0-2
4
VCO(0:2)
VCO Gain
100
3-5
3
PFD(0:2)
Phase Detector Gain
100
6
1
PDEN
Phase Detector Enable (1 =Enable)
100
7
1
INT_FLT
Internal Loop Filter (1 = Internal)
100
8
1
INT_VCO
Internal VCO (1 = Internal)
100
9
0
CLK_SEL
Internal feedback input clock select
(0 = VCO Output)
100
10
1
Reserved
Reserved - Set to One
101
0
1
FBK_SEL
Feedback Select (1 =Internal)
101
1
0
FBK_POL
External Feedback Polarity (1 =Invert)
101
2
0
ADD
Addition of 1 VCO Cycle (0 to 1 = Add)
101
3
0
SWLW
Removal of 1 VCO Cycle (0 to 1 = Swallow)
101
4-5
0
PDA(0:1)
Output Post-Scaler
101
6-7
3
PDB(0:1)
Feedback Post-Scaler
101
8
1
LD_LG
Fine Phase Adj. Lead/Lag (1=Lead)
101
9
0
F_EN
Fine Phase Adj. Enable (1=Enable)
101
10
1
Reserved
Reserved - Set to One
110
0-2
7
L(0:2)
Load Counter
110
3
0
OMUX1
OUT1 Select (0 = Load Cntr, 1 = Div By 4 0Deg)
110
4
0
OMUX2
OUT2 Select (0 = Int Fbk, 1 = Div By 4 90Deg)
110
5
0
OMUX3
OUT3 Select (0 = Sync Lo, 1 = Div By 4 180Deg)
110
6
1
OMUX4
OUT4 Select (0 = Sync Hi, 1 = Div By 4 270Deg)
110
7
0
DACRST
Output Reset (CLK+ = 1, CLK- = 0)
110
8
0
AUXEN
Output Test Mode (1 = Test, See Board Test Support)
110
9
0
AUXCLK
Output Clock When in Test Mode
110
10
0
EXTREF
XTAL/EXTREF Input Buffer (1=EXTREF)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com