Integrated

Circuit

Systems, Inc.

General Description

Features

ICS9159-06

Frequency Generator and Buffer for Pentium™ Systems

9159-06 Rev C 091897

Block Diagram

The ICS9159-06 is a low cost frequency generator designed

specificallyforPentiumsystems.Theintegratedbufferminimizes

skew and provides the early CPU clock required by some

chipsetssuchastheOPTiVIPER.A14.318MHzXTALoscillator

provides the reference clock to generate standard Pentium

frequencies.TheCPUclockmakesgradualfrequencytransitions

without violating the PLL timing of internal microprocessor

clock multipliers.

Asynchronous 33.3 MHz PCI bus operation is supported,

in-dependent of the CPU operating frequency. Green PC

systems are supported through power-down, doze, and

glitch-free stop clock modes.

•

Four CPU clocks operate up to 66 MHz at 3.3V with

glitch-free start and stop plus smooth transitions

•

3-6ns early CPU clock supports OPTi VIPER systems

•

Selection of 8 frequencies, tristate, or power-down

•

Six BUS clocks support asynchronous PCI bus

operation

•

±250ps skew between synchronous outputs

•

Integrated buffer outputs drive up to 30pF loads

•

3.1V -5.5V supply range

•

28-pin 300-mil SOIC package

COMPAQ is a trademark of Compaq Computers.

Pentium is a trademark of Intel Corporation.

Applications

•

Ideal for green Pentium and 486 PCI systems

Functionality

3.1 to 5.5V, 0-70° Crystal=14.318 MHz input

STP0# STP1# DOZE#

FS(0:1)

CPU(0:1)

(MHz)

CPU2,

ECPU

BUS(0:5)

(MHz)

REF(0:3)

(MHz)

1

X

1

00

66.6*

66.6*

33.3

14.318

1

X

1

01

60*

60*

33.3

14.318

1

X

1

10

50

50

33.3

14.318

1

X

1

11

40

40

33.3

14.318

1

X

0

00

33.3

33.3

16.7

14.318

1

X

0

01

30

30

16.7

14.318

1

X

0

10

25

25

16.7

14.318

1

X

0

11

22.5

22.5

16.7

14.318

0

1

1

- -

Stop

Run

Run

14.318

0

0

1

X X

Stop

Stop

Stop

14.318

0

0*

0*

X X

Low

Low

Low

14.318

0

1

0

X X

Tristate Tristate Tristate 14.318

* 3.3 volt operation only. ** 000 mode powers-down the

PLL sections and forces the outputs low. To ensure glitch-

free start and stop of the CPU and BUS clocks enter 000

from 001 and exit 000 through 001.

PRODUCT PREVIEW documents contain information on new

products in the sampling or preproduction phase of development.

Characteristic data and other specifications are subject to change

without notice.

Preliminary Product Preview