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数据搜索系统，热门电子元器件搜索 |
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IDT71342LA55J 数据表(PDF) 7 Page - Integrated Device Technology |
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IDT71342LA55J 数据表(HTML) 7 Page - Integrated Device Technology |
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7 / 13 page  6.05 7 IDT71342SA/LA HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE COMMERCIAL TEMPERATURE RANGE AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE(5) 71342X20 71342X25 71342X35 Symbol Parameter Min. Max. Min. Max. Min. Max. Unit WRITE CYCLE tWC Write Cycle Time 20 — 25 — 35 — ns tEW Chip Enable to End-of-Write (3) 15 — 20 — 30 — ns tAW Address Valid to End-of-Write 15 — 20 — 30 — ns tAS Address Set-up Time 0 — 0 — 0 — ns tWP Write Pulse Width 15 — 20 — 25 — ns tWR Write Recovery Time 0 — 0 — 0 — ns tDW Data Valid to End-of-Write 15 — 15 — 20 — ns tHZ Output High-Z Time (1, 2) —15 — 15 — 20 ns tDH Data Hold Time (4) 0— 0 — 3 — ns tWZ Write Enabled to Output in High-Z (1, 2) —15 — 15 — 20 ns tOW Output Active from End-of-Write (1, 2, 4) 3— 3 — 3 — ns tSWR SEM Flag Write to Read Time 10 — 10 — 10 — ns tSPS SEM Flag Contention Window 10 — 10 — 10 — ns 2721 tbl 11 AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE(5)(CONT'D) 71342X45 71342X55 71342X70 Symbol Parameter Min. Max. Min. Max. Min. Max. Unit WRITE CYCLE tWC Write Cycle Time 45 — 55 — 70 — ns tEW Chip Enable to End-of-Write (3) 40 — 50 — 60 — ns tAW Address Valid to End-of-Write 40 — 50 — 60 — ns tAS Address Set-up Time 0 — 0 — 0 — ns tWP Write Pulse Width 40 — 50 — 60 — ns tWR Write Recovery Time 0 — 0 — 0 — ns tDW Data Valid to End-of-Write 20 — 25 — 30 — ns tHZ Output High-Z Time (1, 2) —20— 25 — 30 ns tDH Data Hold Time (4) 3— 3 — 3 — ns tWZ Write Enabled to Output in High-Z (1, 2) —20— 25 — 30 ns tOW Output Active from End-of-Write (1, 2, 4) 3— 3 — 3 — ns tSWR SEM Flag Write to Read Time 10 — 10 — 10 — ns tSPS SEM Flag Contention Window 10 — 10 — 10 — ns 2721 tbl 12 NOTES: 1. Transition is measured ±500mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization but is not production tested. 3. To access RAM, CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 5. “X” in part number indicates power rating (SA or LA). |
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