376 datasheet(13/95 Pages) INTEL

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376 EMBEDDED PROCESSOR

Combinations of these 3 components make up the 6

additional addressing modes There is no perform-

ance penalty for using any of these addressing com-

binations since the effective address calculation is

pipelined with the execution of other instructions

The one exception is the simultaneous use of BASE

and INDEX components which requires one addi-

tional clock

As shown in Figure 24 the effective address (EA) of

an operand is calculated according to the following

formula

EA e BASERegister a (INDEXRegistercscaling) a

DISPLACEMENT

1 Direct Mode

The operand’s offset is contained

as part of the instruction as an 8- 16- or 32-bit

DISPLACEMENT

2 Register Indirect Mode

A BASE register con-

tains the address of the operand

3 Based Mode

A BASE register’s contents is add-

ed to a DISPLACEMENT to form the operand’s

offset

4 Scaled Index Mode

An INDEX register’s con-

tents is multiplied by a SCALING factor which is

added to a DISPLACEMENT to form the oper-

and’s offset

5 Based Scaled Index Mode

The contents of an

INDEX register is multiplied by a SCALING factor

and the result is added to the contents of a BASE

6 Based Scaled Index Mode with Displacement

The contents of an INDEX register are multiplied

by a SCALING factor and the result is added to

the contents of a BASE register and a DISPLACE-

MENT to form the operand’s offset

240182 – 7

Figure 24 Addressing Mode Calculations

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