6-14

Input Source Resistance

Large values of source resistance where an input bypass

capacitor is not used will not cause errors since the input

currents settle out prior to the comparison time. If a low-

pass filter is required in the system, use a low-value series

resistor (

≤1kΩ) for a passive RC section or add an op amp

RC

active

low-pass

filter.

For

low-source-resistance

applications (

≤1kΩ), a 0.1µF bypass capacitor at the inputs

will minimize EMI due to the series lead inductance of a long

wire. A 100

Ω series resistor can be used to isolate this

capacitor (both the R and C are placed outside the feedback

loop) from the output of an op amp, if used.

Stray Pickup

The leads to the analog inputs (pins 6 and 7) should be kept

as short as possible to minimize stray signal pickup (EMI).

Both EMI and undesired digital-clock coupling to these inputs

can cause system errors. The source resistance for these

inputs should, in general, be kept below 5k

Ω. Larger values of

source resistance can cause undesired signal pickup. Input

bypass capacitors, placed from the analog inputs to ground,

will eliminate this pickup but can create analog scale errors as

these capacitors will average the transient input switching cur-

rents of the A/D (see Analog Input Current). This scale error

depends on both a large source resistance and the use of an

input bypass capacitor. This error can be compensated by a

full scale adjustment of the A/D (see Full Scale Adjustment)

with the source resistance and input bypass capacitor in

place, and the desired conversion rate.

Reference Voltage Span Adjust

For maximum application flexibility, these A/Ds have been

designed to accommodate a 5V, 2.5V or an adjusted voltage

reference. This has been achieved in the design of the IC as

shown in Figure 12.

voltage which is applied to the V+ supply pin, or is equal to

allows for a pseudo-ratiometric voltage reference using, for

the V+ supply, a 5V reference voltage. Alternatively, a volt-

reduction in the reference voltage.

Such an adjusted reference voltage can accommodate a

reduced span or dynamic voltage range of the analog input

voltage. If the analog input voltage were to range from 0.5V to

3.5V, instead of 0V to 5V, the span would be 3V. With 0.5V

the 0.5V input corresponding to zero and the 3.5V input corre-

sponding to full scale. The full 8 bits of resolution are therefore

applied over this reduced analog input voltage range. The req-

uisite connections are shown in Figure 13. For expanded

scale inputs, the circuits of Figures 14 and 15 can be used.

FIGURE 13. OFFSETTING THE ZERO OF THE ADC0802 AND

PERFORMING AN INPUT RANGE (SPAN)

ADJUSTMENT

FIGURE 14. HANDLING

±10V ANALOG INPUT RANGE

V+

DGND

AGND

R

R

DIGITAL

CIRCUITS

ANALOG

CIRCUITS

9

810

20

DECODE

300

ZERO SHIFT VOLTAGE

0.1

µF

5V

-

+

(5V)

FS

ADJ.

“SPAN”/2

ICL7611

2R

5V

2R

R

V+

20

10

µF

6

7

+

ADC0802-

ADC0804

ADC0802, ADC0803, ADC0804