Rev. E 08/12

15

TOP264-271

www.powerint.com

PI-5667-030810

R15

33

Ω

R19

20 k

Ω

R18

10 k

Ω

1%

R17

147 k

Ω

1%

R16

20 k

Ω

R27

10 k

Ω

R22

1.6 k

Ω

U2

LMV431AIMF

1%

D2

RS1K

D3

BAV19WS

R12

4.7 k

Ω

R1

2.2 M

Ω

R2

2.2 M

Ω

R13

6.8

Ω

1/8 W

R20

191 k

Ω

1%

R25

20

Ω

1/8 W

R6

150

Ω

R5

300

Ω

R29

300

Ω

R11

300

Ω

R28

300

Ω

U3B

PS2501-

1-H-A

U3A

PS2501-

1-H-A

L4

200

µH

L3

12 mH

U1

TOP269EG

C7

47

µF

16 V

C16

22 nF

50 V

C22

100 nF

50 V

C19

6.8 nF

50 V

C10

56

µF

35 V

D4

BAV21WS-

7-F

D5

V30100C

C6

100 nF

50 V

D1

GBU8J

600 V

C13

470

µF

25 V

C14

470

µF

25 V

C21

10 nF

50 V

C12

1 nF

100 V

3

T1

RM10 FL1

FL2

5

4

1

C11

1 nF

250 VAC

C1

330 nF

275 VAC

F1

4 A

TOPSwitch-JX

L

N

19 V, 3.42 A

RTN

C2

120

µF

400 V

C9

220 nF

25 V

C4

1000 pF

630 V

C5

2.2 nF

1 kV

VR2

SMAJ250A

90 - 265

VAC

D

S

C

V

F

X

CONTROL

R3

5.1 M

Ω

R7

10 M

Ω

R4

5.1 M

Ω

R9

11 k

Ω

1%

R8

10 M

Ω

R24

2.2

Ω

R14

20

Ω

C15

470 pF

50 V

Q2

MMBT3904

VR1

ZMM5244B-7

Q1

MMBT4403

Input Voltage (VAC)

90

230

Full Power Ef ciency (%) 86.6

89.1

Average Ef ciency (%)

89.5

No-load Input Power (mW) 57.7

115

88.4

89.8

59.7

86.7

R10

100

Ω

Figure 25. Schematic of High Efficiency 19 V, 65 W, Universal Input Flyback Supply with Low No-load.

Application Example

Low No-Load, High Efficiency, 65 W, Universal Input

Adapter Power Supply

The circuit shown in Figure 25 shows a 90 VAC to 265 VAC

input, 19 V, 3.42 A output power supply, designed for operation

inside a sealed adapter case type. The goals of the design were

highest full load efficiency, highest average efficiency (average of

25%, 50%, 75% and 100% load points), and very low no-load

consumption. Additional requirements included latching output

overvoltage shutdown and compliance to safety agency limited

power source (LPS) limits. Measured efficiency and no-load

performance is summarized in the table shown in the schematic

which easily exceed current energy efficiency requirements.

In order to meet these design goals the following key design

decisions were made.

PI Part Selection

•

One device size larger selected than required for power

delivery to increase efficiency

The current limit programming feature of TOPSwitch-JX allows

the selection of a larger device than needed for power delivery.

This gives higher full load, low-line efficiency by reducing the

MOSFET conduction losses (I

RMS

2

× R

overload power, transformer and other components size as if a

smaller device had been used.

For this design one device size larger than required for power

delivery (as recommended by the power table) was selected.

This typically gives the highest efficiency. Further increases in

device size often results in the same or lower efficiency due to

the larger switching losses associated with a larger MOSFET.

Line-Sense Resistor Values

•

Increasing line-sensing resistance from 4 M

W to 10.2 MW to

reduce no-load input power dissipation by 16 mW

Line-sensing is provided by resistors R3 and R4 and sets the

line undervoltage and overvoltage thresholds. The combined

value of these resistors was increased from the standard 4 M

W

to 10.2 M

W. This reduced the resistor dissipation, and therefore

contribution to no-load input power, from ~26 mW to ~10 mW. To

compensate the resultant change in the UV (turn-on) threshold

resistor R20 was added between the CONTROL and VOLTAGE-

MONITOR pins. This adds a DC current equal to ~16

mA into the

VOLTAGE MONITOR pin, requiring only 9

mA to be provided via

R3 and R4 to reach the VOLTAGE MONITOR pin UV (turn-on)

threshold current of 25

mA and setting the UV threshold to 95 VDC.

This technique does effectively disable the line OV feature as

the resultant OV threshold is raised from ~450 VDC to ~980 VDC.

However in this design there was no impact as the value of

input capacitance (C2) was sufficient to allow the design to

withstand differential line surges greater than 2 kV without the

peak drain voltage reaching the BV

Specific guidelines and detailed calculations for the value of

R20 may be found in the TOPSwitch-JX Application Note (AN-47).

Clamp Configuration – RZCD vs RCD

•

An RZCD (Zener bleed) was selected over an RCD clamp to

give higher light load efficiency and lower no-load consumption

The clamp network is formed by VR2, C4, R5, R6, R11, R28,

R29 and D2. It limits the peak drain voltage spike caused by

leakage inductance to below the BV