TOP264VG datasheet(20/40 Pages) POWERINT

20 / 40 page

Rev. E 08/12

TOP264-271

www.powerint.com

mode. As can be seen in Figures 27 and 28, the benefits of jitter

increase with the order of the switching harmonic due to an

increase in frequency deviation. The FREQUENCY pin offers a

switching frequency option of 132 kHz or 66 kHz. In applications

that require heavy snubber on the drain node for reducing high

frequency radiated noise (for example, video noise sensitive

applications such as VCRs, DVDs, monitors, TVs, etc.), operating

at 66 kHz will reduce snubber loss, resulting in better efficiency.

Also, in applications where transformer size is not a concern, use

of the 66 kHz option will provide lower EMI and higher efficiency.

Note that the second harmonic of 66 kHz is still below 150 kHz,

above which the conducted EMI specifications get much tighter.

For 10 W or below, it is possible to use a simple inductor in place

of a more costly AC input common mode choke to meet

worldwide conducted EMI limits.

Transformer Design

It is recommended that the transformer be designed for

maximum operating flux density of 3000 Gauss and a peak flux

density of 4200 Gauss at maximum current limit. The turns ratio

should be chosen for a reflected voltage (V

OR) no greater than

135 V when using a Zener clamp or 150 V (max) when using an

RCD clamp with current limit reduction with line voltage (overload

protection). For designs where operating current is significantly

lower than the default current limit, it is recommended to use an

externally set current limit close to the operating peak current to

reduce peak flux density and peak power (see Figure 18).

Standby Consumption

Frequency reduction can significantly reduce power loss at light

or no-load, especially when a Zener clamp is used. For very

low secondary power consumption, use a TL431 regulator for

feedback control. A typical TOP264-271 circuit automatically

enters MCM mode at no-load and the low frequency mode at

light load, which results in extremely low losses under no-load

or standby conditions.

High Power Designs

The TOP264-271 family contains parts that can deliver up to

162 W. High power designs need special considerations.

Guidance for high power designs can be found in the Design

Guide for TOP264-271 (AN-47).

TOP264-271 Layout Considerations

The TOP264-271 has multiple pins and may operate at high

power levels. The following guidelines should be carefully

followed.

Primary Side Connections

Use a single point (Kelvin) connection at the negative terminal of

the input filter capacitor for the SOURCE pin and bias winding

return. This improves surge capabilities by returning surge

currents from the bias winding directly to the input filter capacitor.

The CONTROL pin bypass capacitor should be located as

close as possible to the SOURCE and CONTROL pins, and its

SOURCE connection trace should not be shared by the main

MOSFET switching currents. All SOURCE pin referenced

components connected to the VOLTAGE MONITOR (V) pin or

EXTERNAL CURRENT LIMIT (X) pin should also be located

closely between their respective pin and SOURCE. Once again,

the SOURCE connection trace of these components should not

be shared by the main MOSFET switching currents. It is very

critical that SOURCE pin switching currents are returned to the

input capacitor negative terminal through a separate trace that is

not shared by the components connected to CONTROL,

VOLTAGE MONITOR or EXTERNAL CURRENT LIMIT pins. This

is because the SOURCE pin is also the controller ground

reference pin. Any traces to the VOLTAGE MONITOR,

EXTERNAL CURRENT LIMIT or CONTROL pins should be kept

as short as possible and away from the DRAIN trace to prevent

noise coupling. Voltage monitor resistors (R

LS in Figures 14, 15,

19, 22, 23, 26, 30) and primary-side OVP circuit components

ZOV/ROV in Figures (29, 30) should be located close to the

VOLTAGE MONITOR pin to minimize the trace length on the

VOLTAGE MONITOR pin side. Resistors connected to the

VOLTAGE MONITOR or EXTERNAL CURRENT LIMIT pin should

be connected as close to the bulk capacitor positive terminal as

possible while routing these connections away from the power

switching circuitry. In addition to the 47

mF CONTROL pin

Figure 28. TOPSwitch-JX Full Range EMI Scan (132 kHz with Jitter) with

Identical Circuitry and Conditions.

-20

-10

0.15

Frequency (MHz)

EN55022B (QP)

EN55022B (AV)

EN55022B (QP)

EN55022B (AV)

-20

-10

0.15

Frequency (MHz)

TOPSwitch-JX (with jitter)

Figure 27. Fixed Frequency Operation without Jitter.

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