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CDP1853CD3 数据表(PDF) 4 Page - Intersil Corporation

部件名 CDP1853CD3
功能描述  High-Reliability CMOS N-Bit 1 of 8 Decoder
PDF  7 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

CDP1853CD3 数据表(HTML) 4 Page - Intersil Corporation

  CDP1853CD3 Datasheet HTML 1Page - Intersil Corporation CDP1853CD3 Datasheet HTML 2Page - Intersil Corporation CDP1853CD3 Datasheet HTML 3Page - Intersil Corporation CDP1853CD3 Datasheet HTML 4Page - Intersil Corporation CDP1853CD3 Datasheet HTML 5Page - Intersil Corporation CDP1853CD3 Datasheet HTML 6Page - Intersil Corporation CDP1853CD3 Datasheet HTML 7Page - Intersil Corporation  
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Disable to Output Low
tEOL
5
-
295
-
400
ns
10
-
200
-
250
ns
N Input to Output
tNO
5
-
225
-
315
ns
10
-
120
-
165
ns
Clock A to Output Low
tAO
5
-
210
-
300
ns
10
-
110
-
150
ns
Clock B to Output Low
tBO
5
-
295
-
400
ns
10
-
200
-
250
ns
Pulse Width:
tCACA
5
50
-
75
-
ns
Clock A
10
25
-
50
-
ns
Clock B
tCBCB
5
50
-
75
-
ns
10
25
-
50
-
ns
Recommended Operating Conditions
At TA = Full Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
PARAMETER
LIMITS
UNITS
CDP1853/3
CDP1853C/3
MIN
MAX
MIN
MAX
DC Operating Voltage Range
4
10.5
4
6.5
V
Input voltage Range
VSS
VDD
VSS
VDD
V
Dynamic Electrical Specifications
See Figure 2, CL = 100pF, tR, tF = 15ns
PARAMETER
SYMBOL
VDD
(V)
LIMITS
UNITS
-55oC, +25oC
+125oC
MIN
MAX
MIN
MAX
CDP1853/3, CDP1853C/3



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