Data Sheet

AD8351

Rev. D | Page 17 of 19

EVALUATION BOARD

An evaluation board is available for experimentation. Various

parameters such as gain, common-mode level, and input and

output network configurations can be modified through minor

resistor changes. The schematic and evaluation board artwork

are presented in Figure 48, Figure 49, and Figure 50.

Figure 48. Component Side Layout

Figure 49. Component Side Silkscreen

Figure 50. Evaluation Board Schematic

R2

24.9Ω

R1

100Ω

R5

0Ω

R7

0Ω

R18

0Ω

R17

0Ω

R8

0Ω

R4

24.9Ω

R3

OPEN

R12

0Ω

J1

RF_IN+

J2

RF_IN–

C3

0.1µF

R6

OPEN

C2

100nF

AGND

VPOS

P1

W1

T1

C10

100nF

C4

100nF

C5

100nF

C9

100nF

T3

J5

TEST IN2

T4

1:1

ETC1-1-13

(MACOM)

1:1

ETC1-1-13

(MACOM)

1:1

ETC1-1-13

(MACOM)

J6

TEST OUT2

R13

OPEN

T2

J3

RF_OUT+

J4

RF_OUT–

C6

100nF

C7

100nF

1:1

ETC1-1-13

(MACOM)

R15

0Ω

R16

0Ω

R11

61.9Ω

R9

61.9Ω

R14

0Ω

R10

61.9Ω

16

15

14

13

5

6

7

8

RGP1

INHI

INLO

RGP2

1

2

3

4

VPOS

OPHI

OPLO

COMM

12

11

10

9

AD8351