AN3324 datasheet(28/37 Pages) STMICROELECTRONICS

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AN3324

CPU core initialization

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Appendix A

CPU core initialization

User, before MCU initialization must initialize CPU core and prepare the right environment

on what user code is executed.

The booting phase include (see Section A.2: Example of SPC56EL60 boot file for Flash):

●

Define reset vector

●

Initialize CPU registers (see Section A.1: CPU register initiliazation)

●

MMU programming

●

Initialize stack and small data section pointers

A.1

CPU register initiliazation

After SPC56ELx reset, core registers must be initialized to a known value to avoid

unexpected fault triggered.

SPC56ELx cores (in Lock Step configuration) are linked to a checker that verify their

alignment: output of Core_0 is compared to output of Core_1 through RCCU (see

Section 3.3: Redundancy Control Checker Unit (RCCU)): if a difference is found the error is

forwarded (see Figure 10: SPC56EL60: checking flow) to FCCU (see Section 3.5: Fault

Collection and Control Unit (FCCU)) and to RGM (see Section 3.4: Reset Generation

Module (MC_RGM)).

Figure 10.

SPC56EL60: checking flow

Core 0

RGM

RCCU

(Checker)

Core 1

FCCU

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