AN3324 datasheet(32/37 Pages) STMICROELECTRONICS

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AN3324

CPU core initialization

Doc ID 18311 Rev 2

32/37

e_stw

r0,0x0(r5)

# Write all 32 registers to SRAM

e_addi

r5,r5,4

# Increment the RAM pointer to next 128byte

e_bdnz

sram_loop2

# Loop for all of SRAM

##---------------------------------------------------------------------------

e_lis

r1, __SP_INIT@h

# Initialize stack pointer r1 to

e_or2i

r1, __SP_INIT@l

# value in linker command file.

e_lis

r13, _SDA_BASE_@h

# Initialize r13 to sdata base

e_or2i

r13, _SDA_BASE_@l

# (provided by linker).

e_lis

r2, _SDA2_BASE_@h

# Initialize r2 to sdata2 base

e_or2i

r2, _SDA2_BASE_@l

# (provided by linker).

e_stwu

r0,-64(r1)

# Terminate stack.

##--------- Load Initialised Data Values from Flash into RAM ----------------

#--------- Load ".data" section value into RAM (un-initialised) -------------

# Set GPR9 to the count of the SRAM load size

e_lis r9, __DATA_SIZE@h

# Load upper SRAM load size (# of bytes) into R9

e_or2ir9, __DATA_SIZE@l # Load lower SRAM load size into R9

e_cmp16ir9,0

# Compare to see if equal to 0

e_beq ROMSDATACOPY

# Exit cfg_ROMCPY if size is zero

mtctr

# Store # of bytes to be moved in spr CTR

e_lis

r10, __DATA_ROM_ADDR@h

# Load address of first SRAM load into R10

e_or2i r10, __DATA_ROM_ADDR@l

# Load lower address of SRAM load into R10

e_subi

r10,r10, 1

# Decrement address to prepare for ROMCPYLOOP

# Load SRAM base address (__DATA_SRAM_ADDR) for loading instructions into R5

(__SRAM_CPY_START = ADDR(.data))

e_lis

r5, __DATA_SRAM_ADDR@h

# Load upper SRAM address into R5

e_or2i

r5, __DATA_SRAM_ADDR@l # Load lower SRAM address into R5

e_subi

r5, r5, 1

# Decrement address to prepare for ROMCPYLOOP

ROMDATACPYLOOP:

e_lbzu

r4, 1(r10) # Load data byte at R10 into R4,incrementing (update) ROM

address

e_stbu

r4, 1(r5)

# Store R4 data byte into SRAM at R5 and update SRAM address

e_bdnz

ROMDATACPYLOOP

# Branch if more bytes to load from ROM

##--------- Load ".sdata" section value into RAM (un-initialised) ------------------

ROMSDATACOPY:

e_lis r9, __SDATA_SIZE@h

# Load upper SRAM load size (# of bytes) into R9

e_or2ir9, __SDATA_SIZE@l # Load lower SRAM load size into R9

e_cmp16ir9,0

# Compare to see if equal to 0

e_beq ROMCPYEND

# Exit cfg_ROMCPY if size is zero

mtctr

# Store # of bytes to be moved in spr CTR

e_lis

r10, __SDATA_ROM_ADDR@h # Load address of first SRAM load into R10

e_or2i r10, __SDATA_ROM_ADDR@l

# Load lower address of SRAM load into R10

e_subi

r10,r10, 1# Decrement address to prepare for ROMCPYLOOP

# Load SRAM base address (__SDATA_SRAM_ADDR) for loading instructions into R5

(__SDATA_SRAM_ADDR = ADDR(.data))

e_lis

r5, __SDATA_SRAM_ADDR@h

# Load upper SRAM address into R5

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AN3324 数据表(PDF) 32 Page - STMicroelectronics

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