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AN3203 数据表(PDF) 25 Page - STMicroelectronics

部件名 AN3203
功能描述  This application note describes the characteristics and performance
PDF  49 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

AN3203 数据表(HTML) 25 Page - STMicroelectronics

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AN3203
Electrical performance
Doc ID 17402 Rev 2
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4.3
Harmonic content measurement
The front-end PFC stage provides the reduction of the mains harmonic, allowing European
EN61000-3-2 and Japanese JEITA–MITI standards for class D equipment to be met.
Figure 19 shows the harmonic contents of the mains current at full load.
A measurement has also been taken with a 75 W input power which is the lowest limit for
using harmonic reduction techniques.
To evaluate the performance of the PFC stage the PF and THD vs. input voltage graphs are
also shown, in Figure 21 and Figure 22, at full load and 75 W input power load conditions.
Table 9 shows the PF values at the three different load amounts defined in the 80 PLUS®
and climate savers computing requirements.
Figure 19.
EN61000-3-2 and JEITA-MITI measurements @ full load
Figure 20.
EN61000-3-2 and JEITA-MITI measurements @ 75 W in



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