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AN4402 数据表(PDF) 7 Page - STMicroelectronics |
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AN4402 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 39 page ![]() DocID025557 Rev 1 7/39 AN4402 Active clamp of the L99MC6 and L9733 38 2.1 Low-side configured outputs Right after the turn-off of a low-side switch, the inductor current decreases, and VL goes negative with the sign convention (Figure 3). Consequently, the MOSFET drain-source voltage VDS increases until VDS reaches VZENER_LS + VF + VGS_TH = VCL_LS. At this moment the MOSFET is turned back on in linear mode. The control loop consisting of a zener between the MOSFET gate and drain (Figure 3) is called the gate-drain clamp in the rest of the document. This circuits maintains VDS (=VD, since the source is connected to GND in this case) to VCL_LS until the energy stored in the inductor is completely dissipated (waveform on Figure 2). VCL_LS has been chosen below the MOSFET breakdown in order to avoid the avalanche conditions. This protection reduces the stress applied to the MOSFET. Figure 3. Low-side of a L99MC6 during the turn-off phase 2.2 High-side configured outputs For a high-side configured output, either the gate-drain clamp or the gate-source clamp is activated (Figure 7 and Figure 8), depending on the conditions. We can distinguish two cases: • Case 1: VBAT < VCL_LS - VCL_HS • Case 2: VBAT > VCL_LS - VCL_HS |
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