AN628 datasheet(9/35 Pages) STMICROELECTRONICS

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AN628 APPLICATION NOTE

Because, in worst condition is:

and the total variation of vca (the reference signal for PWM) is Vsrp:

Multiplying this Gavg by Gca and solving for the crossover frequency (f = fc), follows:

To ensure a phase margin (higher than 45°), the zero frequency (fz) should be about

, than:

⋅

-------------------

avg

⋅

srp

π fL

⋅⋅ ⋅

-------------------------------------

--------

----

⋅

-----------

π C

⋅⋅

⋅

-------------------------------

⇒

⋅

------------------

Figure 11.

Pin 6. LFF (Load feed-forward input). This voltage in-

put pin allows to modify the multiplier output current

proportionally to the load in order to improve the re-

sponse time versus load transient. The control is

working with VLFF between 1.5V and 5.1V. If this

function is not used, the LFF pin has to be connected

to VREF pin.See also appendix A.

Pin 7. VRMS. Input to the divider (1/V2RMS), it is es-

pecially useful in universal mains applications to

compensate the gain variation related to the input

voltage change. It will be connected to an external

network (see fig. 12a) giving a voltage level propor-

tional to the mains VRMS. The best control is reached

using a VRMS voltage level in the range between 1.5V

and 5.5V.

Figure 12a.

To avoid line current distorsion, the rectified mains

ripple (2f) level has to be reduced. A two pole filter,

with three resistors and two capacitors, setting the

lowest pole at 2Hz and the highest one at 13Hz, is

enough to get the useful voltage level reducing to -

80dB the 100Hz gain.

Figure 12b.

The signal (pin 7), with the network in fig. 12a is:

100

1000

10000

100000

-60

-40

-20

100

f [Hz]

Gain [dB]

Gloop

Gca

Gavg

VRMS

1/V2

D94IN064

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