AN1213 APPLICATION NOTE

2/7

The input pin was connected to Vreg tanks to a 4,7 kOhm resistor (R1), the device was supplying a 220 Ohm

resistor (R2)

The cable to the load was a flat , parallel wires,2 m long cable. Tests were performed with a power supply volt-

age varying between 18 and 30 V. Capacitors C4, C2 and C3 were smd ceramic capacitors, C1 was a ceramic

no-smd capacitor (smd capacitor for C1 gives no benefits). On Vcc (C4) a 100nF was used , while on Vreg

(C2) a 10nF was adopted, this for all of the tests.

Figure 1. Bench exemplification

Figure 2. Application schematic

Typically a burst exceeding the tolerance level causes the output transistor to switch off even if the input has

not changed its high state.

Auxiliary

Equipment

Burst

Generator

Load

Insulation Support

Capacitive coupling clamp

EUT

Ground reference plan

Signal and

supply

lines

C1

x

C2

10nF

D1

LED

C3

x

C4

100nF

+V

GND

4

CAP

3

HSO

2

LD

1

LSO

8

Vss

7

Vrg

6

In

5

U1

TDE1707

R1

4.7 k

R2

220