AN1213 APPLICATION NOTE

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Figure 4. Zoom of the Layout

Table 2. Immunity levels for old and new silicon corresponding to C out value

Short circuit and reverse output connection behaviour:

The following evaluation refers to the TDE 1707 rev. B operating with a supply voltage varying between 18 and

30 V, pure resistive load (from 0 to 15 k ohm ), ceramic capacitor on Vcc ( 110 nF ) and Vreg (10 nF )

The TDE 1707 cannot withstand short circuit condition without a delay capacitor connected to pin 3.

When the device is switched on from a cold state there is a zone corresponding to which the protection has no

effect on the output transistor: pin 3 goes low but the output transistor does not switch off as it should. This zone

becomes shorter and shorter with rising temperature and finally it is no longer present: when the device is

switched on warm , the protection is fully working. This period of time in which the protection has no effect is

long enough to have destroying effect on the device if the voltage supply is higher than 24 V. It is possible to

see figure 5 this behaviour ( ch. 1 : Vcc, ch. 3: pin 3, ch. 4: I out ).

It is not possible to filter this effect directly on Vcc and Vreg , at least not for reasonable values of electrolytic

capacitors paralleled to the ceramic ones. It is just sufficient to add a very small capacitor (68pF ) on pin 3 to

have no longer this effect and to avoid the problem.

Cout (nF)

TDE1707

TDE1707 Rev. B

No capacitor

-800 / +300V

-1500 / +600V

1nF

-2500 / +1400V

>(-2500 / +2500V)

10nF

>(-2500 / +2500V)

>(-2500 / +2500V)