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AN1213 APPLICATION NOTE

Figure 3. Spurious transition of the output transistor due to burst pulse

TDE 1707 ( old silicon ): the value of the delay capacitor (C1) does not influence the immunity level of the

device. The device behaves exactly the same whatever it is the value of the capacitor. Without any other ca-

pacitor than the two on Vcc ( C4 ) and on Vreg ( C2 ) the device shows an immunity level of +300 / -800. The

immunity can improve if it is adopted a capacitor on the output ( C3 ). This capacitor has the same effect when-

ever it is connected between ground and output or Vcc and output. With C3=1 nF the immunity level is +1400

/ -2500 V, C3=10 nF bring to an immunity level higher than +2500 /-2500.

TDE 1707 Rev. B ( new silicon ): placing the delay capacitor (C1) results in lowering the fast transient immu-

nity , which is anyway higher than the one acquired in the same conditions with the old silicon. In fact without

capacitor on pin 3 the device is working correctly even with +2500 / -2500 V of burst voltage. This value is

strongly reduced when a delay capacitor is adopted: with C1 = 470 pF, immunity drops to +600 / -1500 V. The

same for higher values of C1 ( ex: 3.3nF ). Even with TDE1707 rev.B it is very useful to filter the output and 1

nF between ground and output (C 3) or between Vcc and output it is sufficient to gain the correct operating of

the device with a burst amplitude of +2500 / -2500.

Layout: anyway it must be underlined the importance of the layout . To gain the highest levels of immunity it is

important to provide an accurate layout for the ground. Star connection is recommended for the ground connec-

tions of the capacitors on Vcc and Vreg.