L6207 datasheet(6/53 Pages) STMICROELECTRONICS

6 / 53 page

AN1762 APPLICATION NOTE

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Figure 6 shows the voltage waveforms at the two OUT pins referring to a possible practical situation, with a peak

output current of 2.8A, VS = 52V, RSENSE = 0.33Ω, TJ = 25°C (approximately) and a good PCB layout. Below

ground spike amplitude is -2.65V for one output; the other

OUT pin is at about 57V. In these conditions, total

differential voltage reaches almost 60V, which is the absolute maximum rating for the DMOS. Keeping differen-

tial voltage between two Output pins belonging to the same Full Bridge within rated values is a must that can

be accomplished with proper selection of Bulk capacitor value and equivalent series resistance (ESR), accord-

ing to current peaks and chopping style and adopting good layout practices to minimize PCB parasitic induc-

tances (see below) [3].

Figure 6. Voltage at the two outputs during the

dead time at a phase change.

3.3 Choosing the Bulk Capacitor

Since the bulk capacitor, placed between VS and GND pins, is charged and discharged during IC operation, its

AC current capability must be greater than the r.m.s. value of the charge/discharge current. In the case of a

PWM current regulation, the current flows from the capacitor to the IC during the on-time (tON) and from the IC

(implementing a fast decay current recirculation technique) or from the power supply (implementing a slow de-

cay current recirculation technique) to the capacitor during the off-time (tOFF). The r.m.s. value of the current

flowing into the bulk capacitor depends on peak output current, output current ripple, switching frequency, duty-

cycle and chopping style. It also depends on power supply characteristics. A power supply with poor high fre-

quency performances (or long, inductive connections to the IC) will cause the bulk capacitor to be recharged

slowly: the higher the current control switching frequency, the higher the current ripple in the capacitor; r.m.s.

current in the capacitor, however, does not exceed the r.m.s. output current. Bulk capacitor value (

C) and the

ESR determine the amount of voltage ripple on the capacitor itself and on the IC. In slow decay, neglecting the

dead-time and output current ripple, and assuming that during the on-time the capacitor is not recharged by the

power supply, the voltage at the end of the

on-time is:

so the supply voltage ripple is:

Out 2

Out 1

OUT

–

ESR

---------





⋅

OUT

ESR

---------





⋅

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