L6207 datasheet(49/53 Pages) STMICROELECTRONICS

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AN1762 APPLICATION NOTE

5.5 EVAL6207N

An evaluation board has been produced to help the evaluation of the device in PowerDIP package. It imple-

ments a typical application with several added components. Figure 53 shows the electrical schematic of the

board; in the table below the part list is reported.

CN1, CN2, CN3, CN4 2-poles connector

JP1

3-pin jumper

CN5

34-poles connector

JP2, JP32-pin jumper

220nF/100V Ceramic or Polyester capacitor R1

100

Ω resistor

220nF/100V Ceramic or Polyester capacitor R2

3.17k

Ω 0.6W resistor

100µF/63V capacitor

R3, R4

4.7k

Ω resistor

10nF/100V Ceramic capacitor

R5, R16

20k

Ω resistor

10µF/16V Capacitor

R6, R7

100k

Ω trimmer

C6, C7

100nF Capacitor

R8, R17

2.2k

Ω 0.4W resistor

C8, C9

68nF Capacitor

R9 to R14

Ω 0.4Ω resistor

C10, C11

820pF Capacitor

R18, R15

Ω trimmer

D1, D2

1N4148 Diode

L6205N

BZX79C5V1 5.1V Zener Diode

L6506

The Evaluation Board provides external connectors for the supply voltage, an external 5V reference for the logic

inputs, four outputs for the motor and a 34-pin connector to control the main functions of the board through an

external µC board or the PractiSPIN tool.

The PractiSPIN tool is composed of a graphic interface software running on a PC that connects with the hard-

ware based on the ST7 µC, which contains an upgradeable firmware. This tool allows a fast and easy evaluation

of the PowerSPIN family devices, giving the ability of driving DC, BLDC and Stepper motors, depending on the

target device. The PractiSPIN connected to the EVAL6207N can drive DC motors and inductive loads, allowing

output voltage and current settings

The PC-software also provides a Power Dissipation and Thermal Analysis section, intended to help a fast eval-

uation of the device, package and dissipating copper area required by the user’s application, and to be a good

starting point designing an application (from the power dissipation and thermal point of view).

Running the evaluation board in stand-alone mode, instead, R15 and R18 set the reference voltage separately

for the two bridges, while R8, C8 and R17, C9 are low-pass filters to provide an external reference voltage by

a PWM output of a µC (see also the Microstepping section). Using external VREF inputs R5, R15, R16, R18

should be disconnected, unless the PractiSPIN ST7 evaluation board is used. This board, in fact, is provided

with an offset cancellation circuitry trimmable through a potentiometer (see PractiSPIN documentation).

R6, C10 and R7, C11 are used to set the off-time of the two channels of the IC.

Closing JP2 and JP3 is recommended for safe Over Current Protection.

The 5V voltage for logic inputs and for references (VrefA and VrefB) is obtained from R2, D3. Depending on the

supply voltage, the value of resistor R2 should be changed in order to ensure a correct biasing of D3.

The jumper JP1 allows choosing the 5V voltage from the internal zener diode network or pin 11 of CN5 (for ex-

ample an external µC board can provide 5V to the evaluation board). Also CN2 connector can be used to pro-

vide an external 5V voltage to the board (in that case R2, D3 should be disconnected). CN2, or pin 1 of CN5,

can also be used to provide a 5V voltage to external circuits (as, for example, the PractiSPIN ST7 board). In this

case the current that can be drawn form the board depends on the supply voltage and on R2 value.

Figure 54 to Figure 56 show the component placement and the two layers layout of the L6207N Evaluation

Board. A large GND area has been used, to guarantee minimal noise and good power dissipation for the device.

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