AN4209 datasheet(13/19 Pages) STMICROELECTRONICS

13 / 19 page

DocID023949 Rev 2

13/19

AN4209

General design procedure

2.3

Transil selection flowchart

Figure 9 summarizes the selection procedure:

Figure 9. Device selection process overview

Use

bigger

package

Use

bigger

package

Application conditions :

operationmax ;VPmax ;Tambmax

Application conditions :

operationmax ;VPmax ;Tambmax

Design safe

Power losses calculation

j evaluation

Power losses calculation

j evaluation

RM (25°C) > Voperationmax

BR (25°C) < V Pmax

RM (25°C) > Voperationmax

BR (25°C) < V Pmax

Tj < 125°C

CLtyp (IPPmax ;125°C) < V Pmax

Select the highest rated voltage

to reduce both Transil power

dissipation & quiescent current..

Select the highest rated voltage

to reduce both Transil power

dissipation & quiescent current..

Decrease the

voltage

rating

Check if 3 criteria are respected

with the ﬁnal device in practice.

Check if 3 criteria are respected

with the ﬁnal device in practice.

Select the smallest package

available.

Select the smallest package

available.

YES

Requested measurements

Æ V

CLtyp

lead

< 125°C

jpeak

YES

Experimental

Theoretical

Voperationmax

Maximum operating voltage across

the device in standby mode (negligible

leakage current consumption).

VPmax

Maximum clamping voltage to not

exceed in application.

VCLtyp(IPPmax; 125°C)

Typical clamping voltage versus peak

current ﬂowing though the device and

its operating junction.

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