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PD46185092B 数据表(PDF) 4 Page - Renesas Technology Corp

部件名 PD46185092B
功能描述  18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
PDF  36 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

PD46185092B 数据表(HTML) 4 Page - Renesas Technology Corp

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μPD46185092B, μPD46185182B, μPD46185362B
R10DS0112EJ0200 Rev.2.00
Page 4 of 35
Nov 09, 2012
Pin Arrangement
165-pin PLASTIC BGA (13 x 15)
(Top View)
[
μPD46185182B]
1M x 18
1
2
3
4
5
6
7
8
9
10
11
A
CQ#
VSS/144M NC/36M
W#
BW1#
K#
NC/288M
R#
A
VSS/72M
CQ
B
NC
Q9
D9
A
NC
K
BW0#
A
NC
NC
Q8
C
NC
NC
D10
VSS
A
A
A
VSS
NC
Q7
D8
D
NC
D11
Q10
VSS
VSS
VSS
VSS
VSS
NC
NC
D7
E
NC
NC
Q11
VDDQ
VSS
VSS
VSS
VDDQNC
D6
Q6
F
NC
Q12
D12
VDDQ
VDD
VSS
VDD
VDDQNC
NC
Q5
G
NC
D13
Q13
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
D5
H DLL#
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQVDDQ
VREF
ZQ
J
NC
NC
D14
VDDQ
VDD
VSS
VDD
VDDQNC
Q4
D4
K
NC
NC
Q14
VDDQ
VDD
VSS
VDD
VDDQNC
D3
Q3
L
NC
Q15
D15
VDDQ
VSS
VSS
VSS
VDDQNC
NC
Q2
M
NC
NC
D16
VSS
VSS
VSS
VSS
VSS
NC
Q1
D2
N
NC
D17
Q16
VSS
A
A
A
VSS
NC
NC
D1
P
NC
NC
Q17
A
A
C
A
A
NC
D0
Q0
R
TDO
TCK
A
A
A
C#
A
A
A
TMS
TDI
A
: Address inputs
TMS
: IEEE 1149.1 Test input
D0 to D17
: Data inputs
TDI
: IEEE 1149.1 Test input
Q0 to Q17
: Data outputs
TCK
: IEEE 1149.1 Clock input
R#
: Read input
TDO
: IEEE 1149.1 Test output
W#
: Write input
VREF
: HSTL input reference input
BW0#, BW1#
: Byte Write data select
VDD
: Power Supply
K, K#
: Input clock
VDDQ
: Power Supply
C, C#
: Output clock
VSS
: Ground
CQ, CQ#
: Echo clock
NC
: No connection
ZQ
: Output impedance matching
NC/xxM
: Expansion address for xxMb
DLL#
: PLL disable
Remarks 1.
×××# indicates active LOW.
2. Refer to Package Dimensions for the index mark.
3. 2A, 3A, 7A and 10A are expansion addresses : 3A for 36Mb
: 3A and 10A for 72Mb
: 3A, 10A and 2A for 144Mb
: 3A, 10A, 2A and 7A for 288Mb
2A and 10A of this product can also be used as NC.



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