Proposed model

AN1232

2/6

1

Proposed model

Figure 1.

Npn Bipolar parasitic transistor

Under impedance mismatch conditions the RF power transistor is subjected to a reflected

wave with an amplitude that cannot be controlled and, in the worse case, with a voltage

clamp for this wave. Under such conditions the device is subjected to an electric current

whose amplitude is proportional to the power of the incident wave. Simultaneously, the

and amplitude of the above current. In the DMOS cross section, shown in Figure 1, the

presence of an npn bipolar parasitic transistor, in which the base and emitter are shorted by

means of the DMOS source metallization, are clearly noticeable.

Under static conditions the parasitic transistor is inhibited by the short circuit, but under

dynamic conditions, when the reverse breakdown current flows through the device, the short

circuit condition itself is modified. In fact, this current crosses the base-emitter junction

through the base resistance which is increased by the depletion layer due to the reverse

We can assume that:

Equation 1

potential on the emitter side opposed to the short circuit is sufficient to turn on the bipolar

transistor, thus concentrating the current and destroying the device.

A simplified model was developed (see Figure 2) to simulate the mismatch condition on the

drain of the DMOS by means of the inductance L.

V

be

R

be

I

dis

•

=