6/9

STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER

3 SECOND CASE: AND OLVL1=1 AND OLVL2=0

Figure 4. PWM output when OLVL2=0 OLVL1=1

In this case, the timer A is also initialized at 10KHz with a 1MHz timer clock.

We can see that when OLVL2=0 and OLVL1=1, to set the duty cycle value, the OC1R register

has to be loaded with the complementary value= compare 2-(the normal value of Compare 1

in the Case 1 example). So for example, with a 10KHz PWM signal with a 1MHz timer clock,

we have OC2R register =005F (see formulas) and so for 20% duty cycle, the normal value of

the OC1R register is:

OC1R=((20.10-6*8.10+6)/8))-5=15 (000F in hexadecimal)

The complementary value is then OC1R=005F-000F=0050 in hexadecimal.

For the initialization phase, we need to set a 0% duty cycle and in this case, instead of config-

uring OLVL2=OLVL1=0 we can simply put a higher value in the OC1R register than in the

OC2R register. This following code example is for a 20% duty cycle signal.

Initialization: Set up 10KHz PWM signal with OLVL2=0 and OLVL1=1 and 0% duty cycle

ld A,#%00000001; set OLVL1=1 and OLVL2=0

ld TACR1,A

ld A,#%10011000;Clock in/8: 1MHz with 16 MHz quartz

ld TACR2,A

ld A,#$00

ld A,TAOC2HR

;compare 2 of timer A set 005F=100-5=95

ld A,#$5F

ld TAOC2LR,A

;frequency set to 10KHz

OCMP1

Ouput Compare pin

Timer output

FFFFh

OC1R

0000h

FFFCh

Ttimer × 65535

Tmax =

OLVL1=1

OLVL2= 0

FREE RUNNING

COUNTER VALUE

time

time

OC2R

OCMP1

Ouput Compare pin

Timer output

FFFFh

OC1R

0000h

FFFCh

Ttimer × 65535

Tmax =

OLVL1=1

OLVL2= 0

FREE RUNNING

COUNTER VALUE

time

time

OC2R