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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER

ld A,#$00

ld TAOC1HR,A

ld A,#$60

ld TAOC1LR,A

; set 0% duty cycle by compare 1 value > compare 2 value

After this initialization, the PWM synchronization at start is done by putting a value into the

compare register that is just higher than the timer restart value.

Synchronization:

ld X,#$FF

;set compare 1 to FFFD just after the timer reset value FFFC

ld TAOC1HR,X

;to force the output PWM high just after restart

ld A,#$FD

ld TAOC1LR,A

add A,#$0F

;ld compare 2 with compare 1+20% duty (000F)

ld Y,A

ld A,X

adc A,#$00

ld TAOC2HR,A

ld TAOC2LR,Y

clr TACLR

;reset timer A to FFFC

bset PADR,#2

;set synchronization flag of timer A

.wait_TA_C1

ld A,TACHR

jrne wait_TA_C1;wait timer A counter=0000 to restore compare 1

ld A,#$00

ld TAOC1HR,A

ld A,#$50

ld TAOC1LR,A

;restore compare 1 to 20% (compare 2*(1-20%))

.wait_TA_C2

btjf TACHR,#7,wait_TA_C2;wait for reset of timer A before restoring com-

pare 2 value

ld A,#$00

ld TAOC2HR,A

ld A,#$5F

;restore compare 2 to 10KHz=100-5=95 (see formulas)

ld TAOC2LR,A

bres PADR,#2

;reset synchronization flag of timer B