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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER

ld TAOC1LR,A

clr TACLR

;reset timer B to FFFC

bset PADR,#2

;set flag synchronisation of timer B

.wait_TA_C2

ld A,TACHR

jrne wait_TA_C2;wait timer A=0000 to restore duty cycle

ld A,#%00000100

ld TACR1,A

;set OLVL1=0 and OLVL2=1

ld A,#$00

ld TAOC1HR,A

ld A,#$2D

;restore duty cycle to 50%

ld TAOC1LR,A

bres PADR,#2

;reset synchronisation flag

Figure 3 shows the waveforms seen on an oscilloscope for OCMP1 pin and the synchroniza-

tion flag using the above software example when the 16-bit timer is started or restarted.

Figure 3. OCMP1 and synchronization flag : OLVL2=1 and OLVL1=0

We can see in Figure 3 that the OCMP1 pin outputs a high state directly after starting the

PWM signal. This avoids losing a PWM cycle in applications where an immediate high state is

required.

PWM

OUTPUT

Timer 16 start

output enabled

flag