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AN1709 数据表(PDF) 10 Page - STMicroelectronics

部件名 AN1709
功能描述  EMC DESIGN GUIDE FOR ST MICROCONTROLLERS
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

AN1709 数据表(HTML) 10 Page - STMicroelectronics

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EMC DESIGN GUIDE FOR ST MICROCONTROLLERS
2.1.2 Latch-Up (LU)
2.1.2.1 Static Latch-Up (LU) test:
The Latch-up is a phenomenon which is defined by a high current consumption resulting from
an overstress that triggers a parasitic thyristor structure and need a disconnection of the
power supply to recover the initial state.
NOTES
1 The overstress can be a voltage or current surge, an excessive rate of change of current or
voltage, or any other abnormal condition that causes the parasitic thyristor structure to be-
come self-sustaining.
2 Latch-up will not damage the device if the current through the low-impedance path is suffi-
ciently limited in magnitude or duration.
This test conforms to the EIA/JESD 78 IC latch-up standard.
True LU is self-sustaining and once triggered, the high current condition will remain until the
power supply voltage is removed from the device. A temporary LU condition is considered to
have been induced if the high current condition stops when only the trigger voltage is re-
moved.
Two complementary static tests are required on 10 parts to assess the latch-up performance:
s
Power supply overvoltage (applied to each power supply pin) simulates a user induced
situation where a transient over-voltage is applied on the power supply.
s
Current injection (applied to each input, output and configurable I/O pin) simulates an
application induced situation where the applied voltage to a pin is greater than the maximum
rated conditions, such as severe overshoot above VDD or undershoot below ground on an
input due to ringing.
Table 7 shows how LU test result is presented in ST datasheets.
Table 7. Example of the LU test result on ST72F521
1.
Class description: “A” class is an STMicroelectronics internal specification. All its limits are higher
than the JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC
standard. “B” Class strictly covers all the JEDEC criteria (international standard).
2.1.2.2 Dynamic Latch-Up (DLU) test:
The product is evaluated for its LU susceptibility to ESD discharges when the microcontroller
is “running.”
Symbol
Parameter
Conditions
Class1)
LU
Static latch-up class
TA=+25°C
TA=+85°C, TA=+125°C (de-
pending on the temperature
range of the device)
A



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