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INTERRUPT HANDLING FOR STR7 MICROCONTROLLERS

2 EXCEPTION PRIORITIES

It is important to remember that several exceptions can occur simultaneously. However, all ex-

ceptions are assigned priorities and are served in a predefined order.

The exception with the highest priority is Reset. Next, in order of decreasing priority, there is

the Data Abort, FIQ (Fast), IRQ (Normal), Prefetch Abort, SWI, and finally the Undefined in-

struction with the lowest priority.

3 EXCEPTION VECTORS

The Reset Vector is at address 0x0000. This is followed by the undefined instruction vector,

the SWI vector, the Prefetch Abort vector, Data abort vector, IRQ vector and FIQ vector.

The exception vector should contain a valid instruction to branch to the exception handler.

A branch instruction (B Exception_Handler) or data instruction (LDR pc,[pc,#offset]) may be

used to jump to the exception handler.

The B instruction can be used if the exception handler is within 32MByte of the exception

vector. The LDR pc,[pc,#offset] instruction loads a content of a memory to the PC, this

memory points the exception handler. This memory location is pointed to by the contents of

the program counter content plus an offset. This is done this way since the exception handler

is outside the 32 Mbytes branch instruction range. Note also that the offset has to be within a

4Kbyte boundary, however, this is not a problem since this address itself doesn't need to con-

tain any code.

The other method of accessing the exception handler is by using the MOV instruction. When

the MOV PC instruction is used, only an appropriate address boundary can be used.

Specially for FIQ exception, since the FIQ vector is the last vector in the table, the handler can

be written directly starting from the FIQ vector. This is quite normal for the FIQ handler, since

it allows for it to be executed immediately, as fast as possible, without having to jump else-

where.

4 ARM OR THUMB ?

It may be necessary to have an application which contains a mixture of ARM and Thumb code.

When an exception occurs, the processor will switch the state automatically to ARM. This is

because the instruction held in the vector table associated with the exception vector must be

an ARM instruction. This vector instruction will jump the program counter to an exception han-

dler. Once the execution of this exception handler has finished, the processor returns to exe-

cute the application in the state it was originally running in, either ARM or Thumb.