AN2523

Enhancements in the STR91xFA devices

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PSRAM configuration register, can be connected to any GPIO output pin and the signal

logic level is controlled by the firmware.

Impact: There is no impact for STR91xF users. The new BGA package is needed to

implement the new EMI signals

7.4.4

Asynchronous mode and PSRAM (Synchronous) mode timings

Description: The STR91xF supports asynchronous access only while the STR91xFA

supports both asynchronous and synchronous modes. There are timing differences

between the modes which are listed below:

1.

ALE pulse width - In asynchronous mode, the ALE pulse width is either 1 or 2 BLCK

clock periods in length. In synchronous mode, the ALE pulse width is truncated to half

or one and half of BCLK.

2.

In asynchronous mode, the control signals such as WRn, RDn, ALE are aligned to the

rising edge of BCLK, while in synchronous mode the signals are aligned with the falling

edge of BCLK.

3.

The WR and RD pulse widths are different in the two modes.

Impact: There is no impact for STR91xF users. The new BGA package is needed to

implement PSRAM mode.