AN2549

Modified features

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1.4

A/D converter

In the ST10F272Z2, the analog/digital converter has been redesigned (compared to the A/D

converter in the ST10F269Zx). The ST10F272Z2 still provides an analog/digital converter

with 10-bit resolution and an on-chip sample and hold circuit.

1.4.1

Hardware / Software impact: conversion timing control

The A/D converter in the ST10F272Z2 is not fully compatible with that of the ST10F269Zx

(timing and programming model).

In the ST10F269Zx, the sample time (to charge the capacitors) and the conversion time are

programmable and can be adjusted to the external circuitry. The total conversion time is

compatible with the formula used for ST10F269Zx, whereas the meanings of the ADCTC

and ADSTC bit fields are no longer compatible.

The user should take care of the Sample time parameter: This is the time during which the

capacitances of the converter are charged via the respective analog input pins. Table 5

shows the differences in sample time.

Table 4.

ST10F272Z2 conversion timing table

ADCTC

ADSTC

Sample

Comparison

Extra

Total conversion

00

00

TCL * 120

TCL * 240

TCL * 28

TCL * 388

00

01

TCL * 140

TCL * 280

TCL * 16

TCL * 436

00

10

TCL * 200

TCL * 280

TCL * 52

TCL * 532

00

11

TCL * 400

TCL * 280

TCL * 44

TCL * 724

11

00

TCL * 240

TCL * 120

TCL * 52

TCL * 772

11

01

TCL * 280

TCL * 560

TCL * 28

TCL * 868

11

10

TCL * 400

TCL * 560

TCL * 100

TCL * 1060

11

11

TCL * 800

TCL * 560

TCL * 52

TCL * 1444

10

00

TCL * 480

TCL * 960

TCL * 100

TCL * 1540

10

01

TCL * 560

TCL * 1120

TCL * 52

TCL * 1732

10

10

TCL * 800

TCL * 1120

TCL * 196

TCL * 2116

10

11

TCL * 1600

TCL * 1120

TCL * 164

TCL * 2884