AN2549

Modified features

5/33

Software impact

In case the optional 32 kHz is not used, the OFF32 bit of the RTCCON register must be set.

Prior to setting the OFF32 bit in the RTCCON register, the RTC must be enabled by setting

RTCEN, bit 4 of XPERCON, and XPEN, bit 2 of SYSCON.

1.2

XRAM

The ST10F269Zx has 10 Kbytes of extension RAM whereas the ST10F272Z2 has

18 Kbytes.

The XRAM of the ST10F269Zx is divided into two ranges being XRAM1 of 2 Kbytes and

XRAM2 of 8 Kbytes:

●

The XRAM1 address range is 00’E000h - 00’E7FFh if enabled.

●

The XRAM2 address range is 00’C000h - 00’DFFFh if enabled.

The XRAM of the ST10F272Z2 is divided into two ranges being XRAM1 of 2 Kbytes

(compatible with the ST10F269Zx) and XRAM2 of 16 Kbytes with a user reprogrammable

address range:

●

The XRAM1 address range is 00’E000h - 00’E7FFh if enabled (XPEN and XRAM1EN,

bit 2 of SYSCON register and bit 2 of XPERCON register, respectively, must be set).

●

The XRAM2 address range is 09’0000h - 09’3FFFh, by default (mirrored every

16 Kbytes in the range 09’0000h -0F’FFFFh), if enabled (XPEN and XRAM2EN, bit 2 of

SYSCON register and bit 3 of XPERCON register, respectively, must be set).

Hardware impact

None.

Software impact

There is no change in the enabling of the XRAM blocks: XPERCON register bits, XRAM1EN

and XRAM2EN, and SYSCON register bit, XPEN, are used to enable them.

The memory mapping of the application is impacted by the difference in XRAM size and by

the location of XRAM2. A new register has been created in order to allow the user to remap

the XRAM2 (please refer to Section 4.1: XADRS3 register on page 23 for details).

1.3

Flash EEPROM

Table 2.

Flash memory key characteristics

Characteristic

ST10F269Zx

ST10F272Z2

Flash size

256 Kbytes

256 Kbytes

Flash organization

7 blocks

8 blocks

Programming voltage

5 volts

5 volts

Programming method

Write/Erase Controller

Write/Erase Controller

Program / Erase cycles

100000 cycles

100000 cycles