AN3099

PL_CLK & PL_GPIO IBIS model selection

Doc ID 16605 Rev 1

3/13

You must search in the user manual for the following register names:

1.

PL_GPIO0_PAD_PRG (Address 0x130)

2.

PL_GPIO1_PAD_PRG (Address 0x134)

3.

PL_GPIO2_PAD_PRG (Address 0x138)

4.

PL_GPIO3_PAD_PRG (Address 0x13C)

5.

PL_GPIO4_PAD_PRG (Address 0x140)

For all the models the first two bits are the high voltage level:

MODEOP0 = 1

MODEOP1 = 1

The correlation between bits 0-2 of the model group names and the bits of each register is

given below:

●

Register PL_GPIO0_PAD_PRG (Address 0xFCA80130).

PL_GPIO [23:20]:

DRV1 = PL_GPIO0_PAD_PRG [27]

DRV0 = PL_GPIO0_PAD_PRG [26]

SL = PL_GPIO0_PAD_PRG [25]

PL_GPIO [19:16]:

DRV1 = PL_GPIO0_PAD_PRG [22]

DRV0 = PL_GPIO0_PAD_PRG [21]

SL = PL_GPIO0_PAD_PRG [20]

PL_GPIO [15:12]:

DRV1 = PL_GPIO0_PAD_PRG [17]

DRV0 = PL_GPIO0_PAD_PRG [16]

SL = PL_GPIO0_PAD_PRG [15]

PL_GPIO [11:8]:

DRV1 = PL_GPIO0_PAD_PRG [12]

DRV0 = PL_GPIO0_PAD_PRG [11]

SL = PL_GPIO0_PAD_PRG [10]

PL_GPIO [7:4]:

DRV1 = PL_GPIO0_PAD_PRG [7]

DRV0 = PL_GPIO0_PAD_PRG [6]

SL = PL_GPIO0_PAD_PRG [5]

PL_GPIO [3:0]:

DRV1 = PL_GPIO0_PAD_PRG [2]

DRV0 = PL_GPIO0_PAD_PRG [1]

SL = PL_GPIO0_PAD_PRG [0]

●

Register PL_GPIO1_PAD_PRG (Address 0xFCA80134).

PL_GPIO [47:44]:

DRV1 = PL_GPIO1_PAD_PRG [27]

DRV0 = PL_GPIO1_PAD_PRG [26]

SL = PL_GPIO1_PAD_PRG [25]