Status register interrupt bit clear issue

AN3140

10/14

Doc ID 16997 Rev 1

6

Status register interrupt bit clear issue

This section provides a technical explanation of the problem reported during the Puppy

Linux project debugging about the usage of the GPT and suggests a safe solution for it.

6.1

Problem description

During the usage of the GPT inside SPEAr3xx an issue can be faced when the timer is used

in AutoReload mode. For more details on GPT usage, please refer to SPEAr3xx user

manual.

The unexpected behavior might occur when the CPU tries to clear the interrupt request bit

inside the status register of the timer (TIMER_STATUS_INT_ACK). This clear operation is

performed through a write '1' command from the CPU to the APB interface of the GPT. It

could happen that this write fails, the interrupt request bit is not cleared and the GPT is not

able to generate further interrupts until a new successfully write '1' operation is performed.

The risk in this case, as the GPT is in AutoReload mode, is to lose some interrupt events.

The source of this weakness is in the asynchronism between the APB_clk (75 MHz in the

Puppy Linux application) of the write command and the Timer_clk (48MHz in Puppy Linux

application) of the status register. To better understand the mechanism of this interrupt clear

operation, please refer to Figure 5.

Figure 5.

Status register control logic

When a match condition is reported, the structure of the MATCH1_reg and MATCH1_S_reg

generates a pulse 0 to 1 to 0, which lasts one TIMER_clk cycle, on the input D of the