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LTC2953 数据表(PDF) 17 Page - Linear Technology |
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LTC2953 数据表(HTML) 17 Page - Linear Technology |
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17 / 20 page ![]() LTC2953 17 2953f TYPICAL APPLICATIONS Push Button Controlled μP Reset The circuit of Figure 19 can be used to keep a μP in reset for 200ms after the push button has enabled system power. After system power has stabilized, the voltage monitor input continues to monitor the supply at the load end. ON/OFF EN VIN VM RST LTC2953-2 R3 499k R2 100k 2953 F19 PB VM RST PB R5 100k R9 100k R11 510k 3.3V TO LOAD 200ms 0.5V ON/OFF EN VIN VM RST LTC2953-2 DC/DC #1 R3 866k R2 200k 2953 F20 PFI PFO PB R5 100k R9 100k DC/DC #2 R15 604k R16 200k SHDN SHDN VOUT VOUT VIN VIN V3 1.8V V2 2.5V V1 3.3V VTH = 2.66V VTH = 2.01V 3.3V Push Button Controlled Supply Sequencing The circuit in Figure 20 uses the LTC2953-2 to sequence 3 supply rails. Power on sequencing begins by pressing the push button for 32ms. This asserts the ⎯E⎯N output low, which turns on the V1 supply. 200ms after V1 reaches 80% of its final value (2.66V), the V2 supply is enabled. When the V2 DC voltage reaches 80% of its final value (2V), the V3 supply is enabled. Note that there is no internal delay from the ⎯P⎯F⎯I input to the ⎯P⎯F⎯O output and so V3 is enabled at the same time V2 rises above 2V. A power down supply sequence begins when any of these inputs is asserted: ⎯P⎯B , UVLO or ⎯K⎯I⎯L⎯L . When ⎯E⎯N pulls up to VIN, V1 disconnects first. When V1 decays to 2.66V, V2 is immediately disabled (there is no 200ms delay from VM to ⎯R⎯S⎯T during power down). When V2 decays to 2V, V3 is immediately disabled. See Figure 21 timing diagram. 32ms 200ms PB V1 EN 2953 F21 V2 V3 POWER ON POWER OFF 80% 80% 80% 80% Figure 19. Push Button Controlled μP Reset Figure 21. Push Button Controlled Supply Sequence Timing Figure 20. Push Button Controlled Supply Sequencing |
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