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LTC2953 数据表(PDF) 4 Page - Linear Technology |
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LTC2953 数据表(HTML) 4 Page - Linear Technology |
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4 / 20 page ![]() LTC2953 4 2953f ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.7V to 27V, unless otherwise noted (Note 2). Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. Note 3: The Enable Lock Out time is designed to allow an application to properly power down such that the next power up sequence starts from a consistent powered down configuration. ⎯P⎯B is ignored during this lock out time. This time delay does not include tDB, ON. Note 4: To manually force a release of the EN/⎯E⎯N pin, either ⎯P⎯B or UVLO must be held low for at least tPD, Min (internal default power down timer) + tPDT (adjustable by placing external capacitor at PDT pin). Note 5: The ⎯K⎯I⎯L⎯L turn on blanking timer period (tKILL, ON BLANK) is the waiting period immediately after enable output is asserted. This blanking time allows sufficient time for the DC/DC converter and the μP to perform power up tasks. The ⎯K⎯I⎯L⎯L, ⎯P⎯B and UVLO inputs are ignored during this period. If ⎯K⎯I⎯L⎯L remains low at the end of this blanking period, the enable output is released, thus turning off system power. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IPFI(LKG) ⎯P⎯F⎯I Leakage Current VPFI = 0.5V VPFI = 27V ● 2 ±10 ±1 nA μA IPFO(LKG) ⎯P⎯FO Leakage Current VPFO = 1V VPFO = 40V ● 2 ±10 ±1 nA μA IUVLO(LKG) UVLO Leakage Current VUVLO = 0.5V VUVLO = 27V ● 2 ±10 ±1 nA μA IVM(LKG) VM Input Leakage Current VM = 0.5V ● 2 ±10 nA IRST(LKG) ⎯R⎯S⎯T Output Leakage Current VRST = 3V ● ±0.1 μA tPFI ⎯P⎯F⎯I Delay to ⎯P⎯F⎯O ● 40 100 200 μs tRST Reset Timeout Period ● 140 200 260 ms tuv VM Under Voltage Detect to ⎯R⎯S⎯T VM Less Than VM(TH) By More Than 1% 250 μs |
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