LTC1649CS datasheet(4/16 Pages) LINER

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LTC1649

G1 (Pin 1): Driver Output 1. Connect this pin to the gate of

the upper N-channel MOSFET, Q1. This output will swing

from PVCC1 to GND. G1 will always be low when G2 is high.

In shutdown, G1 and G2 go low.

PVCC1 (Pin 2): Power VCC for Driver 1. This is the power

supply input for G1. G1 will swing from PVCC1 to GND.

PVCC1 must be connected to a potential of at least VIN +

VGS(ON)(Q1). This potential can be generated using a

simple charge pump connected to the switching node

between the two external MOSFETs as shown in Figure 1.

GND (Pin 3): System Ground. Connect to a low impedance

ground in close proximity to the source of Q2. The system

signal and power grounds should meet at only one point,

at the GND pin of the LTC1649.

FB (Pin 4): Feedback. The FB pin is connected to the output

through a resistor divider to set the output voltage.

VOUT = VREF [1 + (R1/R2)].

SHDN (Pin 5): Shutdown, Active Low. A TTL compatible

LOW level at SHDN for more than 50

µs puts the LTC1649

into shutdown mode. In shutdown, G1, G2, COMP and SS

go low, and the quiescent current drops to 25

µA max.

CPOUT remains at 5V in shutdown mode. A TTL compatible

HIGH level at SHDN allows the LTC1649 to operate nor-

mally.

SS (Pin 6): Soft Start. An external capacitor from SS to

GND controls the startup time and also compensates the

current limit loop, allowing the LTC1649 to enter and exit

current limit cleanly.

VIN (Pin 7): Charge Pump Input. This is the main low

voltage power supply input. VIN requires an input voltage

between 3V and 5V. Bypass VIN to ground with a 1µF

ceramic capacitor located close to the LTC1649.

C – (Pin 8): Flying Capacitor, Negative Terminal. Connect

a 1

µF ceramic capacitor from C– to C+.

C+ (Pin 9): Flying Capacitor, Positive Terminal.

CPOUT (Pin 10): Charge Pump Output. CPOUT provides a

regulated 5V output to provide power for the internal

switching circuitry and gate drive for the external MOSFETs.

CPOUT should be connected directly to PVCC2 in most

applications. At least 10

µF of reservoir capacitance to

ground is required at CPOUT. This requirement can usually

be met by the bypass capacitor at PVCC2.

COMP (Pin 11): External Compensation. The COMP pin is

connected directly to the output of the internal error

amplifier and the input of the PWM generator. An RC

network is used at this node to compensate the feedback

loop to provide optimum transient response.

IMAX (Pin 12): Current Limit Set. IMAX sets the threshold

for the internal current limit comparator. If IFB drops below

IMAX with G1 on, the LTC1649 will go into current limit.

IMAX has an internal 12µA pull-down to GND. The voltage

at IMAX can be set with an external resistor to the drain of

Q1 or with an external voltage source.

IFB (Pin 13): Current Limit Sense. Connect to the switched

node at the source of Q1 and the drain of Q2 through a 1k

Ω

resistor. The resistor is required to prevent voltage tran-

sients at the switched node from damaging the IFB pin. IFB

can be taken up to 18V above GND without damage.

VCC (Pin 14): Internal Power Supply. VCC provides power

to the feedback amplifier and switching control circuits.

VCC is designed to run from the 5V supply provided by

CPOUT. VCC requires a 10µF bypass capacitor to GND.

PVCC2 (Pin 15): Power VCC for Driver 2. This is the power

supply input for G2. G2 will swing from PVCC2 to GND.

PVCC2 must be connected to a potential of at least

VGS(ON)(Q2). This voltage is usually supplied by the CPOUT

pin. PVCC2 requires a bypass capacitor to GND; this

capacitor also provides the reservoir capacitance required

by the CPOUT pin.

G2 (Pin 16): Driver Output 2. Connect this pin to the gate

of the lower N-channel MOSFET, Q2. This output will

swing from PVCC2 to GND. G2 will always be low when G1

is high. In shutdown, G1 and G2 go low.

PIN FUNCTIONS

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