LTC1663CMS8 datasheet(3/12 Pages) LINER

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LTC1663

ELECTRICAL C

HARA TERISTICS The q denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VCC set as reference, VOUT unloaded,

unless otherwise noted.

The q denotes specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VCC set as reference, VOUT unloaded, unless otherwise noted.

TI I G CHARACTERISTICS

Note 1: Absolute maximum ratings are those values beyond which the life

of a device may be impaired.

Note 2: Nonlinearity and monotonicity are defined from code 20 to code

1003 (full scale). See Applications Information.

Note 3: Digital inputs at 0V or VCC.

Note 4: Load is 10k

Ω in parallel with 100pF.

Note 5: VCC = VREF = 5V. DAC switched between 0.1VFS and 0.9VFS,

i.e., codes k = 102 and k = 922.

Note 6: All values are referenced to VIH and VIL levels.

Note 7: Guaranteed by design and not subject to test.

SYMBOL

PARAMETER

MIN

TYP

MAX

UNITS

SMBus Timing Characteristics (Notes 6, 7)

fSMB

SMBus Operating Frequency

100

kHz

tBUF

Bus Free Time Between Stop and Start Condition

4.7

µs

tHD, STA

Hold Time After (Repeated) Start Condition

4.0

µs

tSU, STA

Repeated Start Condition Setup Time

4.7

µs

tSU, STO

Stop Condition Setup Time

4.0

µs

tHD, DAT

Data Hold Time

300

tSU, DAT

Data Setup Time

250

tLOW

Clock Low Period

4.7

µs

tHIGH

Clock High Period

4.0

µs

Clock, Data Fall Time

300

Clock, Data Rise Time

1000

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Impedance to VCC

Input Code = 1023, VCC = 5V

Ω

Input Code = 1023, VCC = 3V

120

Ω

AC Performance

Voltage Output Slew Rate

Rising (Notes 4, 5)

0.75

µs

Falling (Notes 4, 5)

0.25

µs

Voltage Output Settling Time

±0.5LSB (Notes 4, 5)

µs

Digital Feedthrough

0.75

nV • s

Digital-to-Analog Glitch Impulse

1LSB Change Around Major Carry

nV • s

Digital Inputs SCL, SDA

VIH

High Level Input Voltage

1.4

VIL

Low Level Input Voltage

0.6

VLTH

Logic Threshold Voltage

ILEAK

Digital Input Leakage

VCC = 5.5V and 0V, VIN = GND to VCC

±1

µA

CIN

Digital Input Capacitance

(Note 7)

Digital Output SDA

VOL

Digital Output Low Voltage

IPULLUP = 350µA

0.4

Address Inputs AD0, AD1, AD2 (MSOP Only)

IUP

Address Pin Pull-Up Current

VIN = 0V

0.5

1.5

µA

VIH

High Level Input Voltage

VCC – 0.3

VIL

Low Level Input Voltage

0.8

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