LTC2753

17

2753f

OPERATION—EXAMPLES

WR

2753 TD03

SPAN I/O

INPUT

DATA I/O

INPUT

UPD

D/S

010

READ = LOW

UPDATE

WR

2753 TD04

SPAN I/O

INPUT

DATA I/O

INPUT

READ = LOW

UPD

D/S

011

UPDATE (5V)

UPDATE (–5V)

WR

2753 TD05

DATA I/O

OUTPUT

DATA I/O

INPUT

READ

UPD

D/S

HI-Z

INPUT REGISTER

DAC REGISTER

HI-Z

UPDATE (2.5V)

1. Load ±5V range with the output at 0V. Note that since span and code are updated together, the output, if started at

0V, will stay there. The 16-Bit DAC code is shown in hex for compactness.

2. Load ±10V range with the output at 5V, changing to –5V.

and DAC registers before updating.