13

7

OUTPUT

LATCH

TIMER

CONTROL LOGIC

POR

GENERATOR

PRESCALER

÷ 1023

(SEE NOTE)

CLOCK

SELECT

LOGIC

LATCH

LATCH

LATCH

4

6

5

2

1

3

TRIGGER

B

A

OSC

CLOCK

SELECT

EXT

CLOCK

+V

8

9

10

11

12

+V

FIGURE 5. LS7210 BLOCK DIAGRAM

14

OUT

+V

+V

+V

+V

+V

-V

WB4

WB3

WB2

WB1

WB0

+V

2

NOTE:

÷ 1023 is standard. Any number from 1 to 1022 can be mask programmed.

7210-020298-4

B

A

TRIG

CS

OSC

EXT

CLK

OUT

WB0

WB1

WB2

WB3

WB4

FIGURE 6. ASYMMETRICAL FLASHER

NOTE:

Inputs A, B in Dual-Delay mode. For symmetical flasher tie Pins 8, 9, 10, 11 & 12 to fixed logic level.

8.068 s

323ms

68K

47K

+V

+V

f = 3.17KHz

.005µF

7

6

5

4

2

1

14

13

12

11

10

9

8

3

OUT

OUT

f