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P3C1256L 数据表(PDF) 5 Page - Pyramid Semiconductor Corporation |
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P3C1256L 数据表(HTML) 5 Page - Pyramid Semiconductor Corporation |
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5 / 11 page ![]() P3C1256L - 32K x 8 STATIC CMOS RAM Page 5 Document # SRAM143 REV A AC CHARACTERISTICS—WRITE CyCLE (Over Recommended Operating Temperature & Supply Voltage) Symbol Parameter -55 -70 -85 Unit Min Max Min Max Min Max t WC Write Cycle Time 55 70 85 ns t CW Chip Enable Time to End of Write 50 60 75 ns t AW Address Valid to End of Write 50 60 75 ns t AS Address Setup Time 0 0 0 ns t WP Write Pulse Width 40 50 60 ns t AH Address Hold Time 0 0 0 ns t DW Data Valid to End of Write 25 30 35 ns t DH Data Hold Time 0 0 0 ns t WZ Write Enable to Output in High Z 25 30 35 ns t OW Output Active from End of Write 5 5 5 ns TIMIng WAVEFORM OF WRITE CyCLE nO. 1 (WE COnTROLLED)(10,11) Notes: 10. CE and WE must be LOW for WRITE cycle. 11. OE is LOW for this WRITE cycle to show t WZ and tOW. 12. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state 13. Write Cycle Time is measured from the last valid address to the first transitioning address. |
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