MCP3204/3208

DS21298B-page 12

Preliminary

© 1999 Microchip Technology Inc.

3.0

PIN DESCRIPTIONS

3.1

CH0 - CH7

Analog inputs for channels 0 - 7 respectively for the

multiplexed inputs. Each pair of channels can be pro-

grammed to be used as two independent channels in

single ended-mode or as a single pseudo-differential

input where one channel is IN+ and one channel is IN-.

See Section 4.1 and Section 5.0 for information on pro-

gramming the channel configuration.

3.2

CS/SHDN(Chip Select/Shutdown)

The CS/SHDN pin is used to initiate communication

with the device when pulled low and will end a conver-

sion and put the device in low power standby when

pulled high. The CS/SHDN pin must be pulled high

between conversions.

3.3

CLK (Serial Clock)

The SPI clock pin is used to initiate a conversion and to

clock out each bit of the conversion as it takes place.

See Section 6.2 for constraints on clock speed.

3.4

The SPI port serial data input pin is used to load chan-

nel configuration data into the device.

3.5

The SPI serial data output pin is used to shift out the

results of the A/D conversion. Data will always change

on the falling edge of each clock as the conversion

takes place.

3.6

AGND

Analog ground connection to internal analog circuitry.

3.7

DGND

Digital ground connection to internal digital circuitry.

4.0

DEVICE OPERATION

The MCP3204/3208 A/D Converters employ a conven-

tional SAR architecture. With this architecture, a sam-

ple is acquired on an internal sample/hold capacitor for

1.5 clock cycles starting on the fourth rising edge of the

serial clock after the start bit has been received. Follow-

ing this sample time, the device uses the collected

charge on the internal sample and hold capacitor to

produce a serial 12-bit digital output code. Conversion

rates of 100ksps are possible on the MCP3204/3208.

See Section 6.2 for information on minimum clock

rates. Communication with the device is done using a

4-wire SPI-compatible interface.

4.1

Analog Inputs

The MCP3204/3208 devices offer the choice of using

the analog input channels configured as single-ended

inputs or pseudo-differential pairs. The MCP3204 can

be configured to provide two pseudo-differential input

pairs or four single-ended inputs. the MCP3208 can be

configured to provide four pseudo-differential input

pairs or eight single-ended inputs. Configuration is

done as part of the serial command before each con-

version begins. When used in the pseudo-differential

mode, each channel pair (i.e., CH0 and CH1, CH2 and

CH3 etc.) are programmed as the IN+ and IN- inputs as

part of the command string transmitted to the device.

The IN+ input can range from IN- to (V

IN- input is limited to ±100mV from the V

input can be used to cancel small signal com-

mon-mode noise which is present on both the IN+ and

IN- inputs.

When operating in the pseudo-differential mode, if the

voltage level of IN+ is equal to or less than IN-, the

resultant code will be 000h. If the voltage at IN+ is equal

to or greater than {[V

put code will be FFFh. If the voltage level at IN- is more

than 1 LSB below V

input will have to go below V

code. Conversely, if IN- is more than 1 LSB above V

then the FFFh code will not be seen unless the IN+

input level goes above V

For the A/D Converter to meet specification, the charge

holding capacitor, (C

to acquire a 12-bit accurate voltage level during the 1.5

clock cycle sampling period. The analog input model is

shown in Figure 4-1.

In this diagram it is shown that the source impedance

(R

ance, directly affecting the time that is required to

charge the capacitor, C

source impedances increase the offset, gain, and inte-

gral linearity errors of the conversion. See Figure 4-2.

4.2

Reference Input

For each device in the family, the reference input (V

determines the analog input voltage range. As the ref-

erence input is reduced, the LSB size is reduced

accordingly. The theoretical digital output code pro-

duced by the A/D Converter is a function of the analog

input signal and the reference input as shown below.

where:

V

V

When using an external voltage reference device, the

system designer should always refer to the manufac-

turer’s recommendations for circuit layout. Any instabil-

ity in the operation of the reference device will have a

direct effect on the operation of the A/D Converter.

Digital Output Code = 4096 * V

IN

V

REF