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PIC16C925/CL 数据表(PDF) 92 Page - Microchip Technology |
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PIC16C925/CL 数据表(HTML) 92 Page - Microchip Technology |
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92 / 182 page ![]() PIC16C925/926 DS39544A-page 90 Preliminary 2001 Microchip Technology Inc. 11.1.2 MULTIPLEX TIMING GENERATION The timing generation circuitry will generate one to four common clocks based on the display mode selected. The mode is specified by bits LMUX1:LMUX0 (LCDCON<1:0>). Table 11-1 shows the formulas for calculating the frame frequency. TABLE 11-1: FRAME FREQUENCY FORMULAS TABLE 11-2: APPROXIMATE FRAME FREQUENCY (IN Hz) USING TIMER1 @ 32.768 kHz OR FOSC @ 8 MHz TABLE 11-3: APPROXIMATE FRAME FREQUENCY (IN Hz) USING INTERNAL RC OSC @ 14 kHz Multiplex Frame Frequency = Static Clock source/(128 * (LP3:LP0 + 1)) 1/2 Clock source/(128 * (LP3:LP0 + 1)) 1/3 Clock source/(96 * (LP3:LP0 + 1)) 1/4 Clock source/(128 * (LP3:LP0 + 1)) LP3:LP0 Static 1/2 1/3 1/4 2 85 85 114 85 3 64 64 85 64 4 51 51 68 51 5 43 43 57 43 6 37 37 49 37 7 32 32 43 32 LP3:LP0 Static 1/2 1/3 1/4 0 109 109 146 109 1 55 55 73 55 2 36 36 49 36 3 27 27 36 27 |
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