PIC16C925SLASHCL datasheet(115/182 Pages) MICROCHIP

115 / 182 page

 2001 Microchip Technology Inc.

Preliminary

DS39544A-page 113

PIC16C925/926

13.0

INSTRUCTION SET SUMMARY

Each PIC16CXXX instruction is a 14-bit word divided

into an OPCODE which specifies the instruction type

and one or more operands which further specify the

operation of the instruction. The PIC16CXXX instruc-

tion set summary in Table 13-2 lists byte-oriented, bit-

oriented,

and

literal

and

control

operations.

Table 13-1 shows the opcode field descriptions.

The instruction set is highly orthogonal and is grouped

into three basic categories:

• Byte-oriented operations

• Bit-oriented operations

• Literal and control operations

For byte-oriented instructions, 'f' represents a file reg-

ister designator and 'd' represents a destination desig-

nator. The file register designator specifies which file

The destination designator specifies where the result of

the operation is to be placed. If 'd' is zero, the result is

placed in the W register. If 'd' is one, the result is placed

in the file register specified in the instruction.

For bit-oriented instructions, 'b' represents a bit field

designator which selects the number of the bit affected

by the operation, while 'f' represents the address of the

file in which the bit is located.

For literal and control operations, 'k' represents an

eight or eleven bit constant or literal value.

FIGURE 13-1:

GENERAL FORMAT FOR

INSTRUCTIONS

TABLE 13-1:

OPCODE FIELD

DESCRIPTIONS

All instructions are executed within one single instruc-

tion cycle, unless a conditional test is true, or the pro-

gram counter is changed, as a result of an instruction.

In this case, the execution takes two instruction cycles,

with the second cycle executed as a NOP. One instruc-

tion cycle consists of four oscillator periods. Thus, for

an oscillator frequency of 4 MHz, the normal instruction

execution time is 1

µs. If a conditional test is true, or the

program counter is changed, as a result of an instruc-

tion, the instruction execution time is 2

µs.

Table 13-2 lists the instructions recognized by the

MPASMTM assembler.

Figure 13-1 shows the general formats that the instruc-

tions can have.

All examples use the format ‘0xnn’ to represent a

hexadecimal number.

Byte-oriented file register operations

d = 0 for destination W

OPCODE

f (FILE #)

d = 1 for destination f

f = 7-bit file register address

Bit-oriented file register operations

10 9

7 6

OPCODE

b (BIT #)

f (FILE #)

b = 3-bit bit address

f = 7-bit file register address

Literal and control operations

OPCODE

k (literal)

k = 8-bit immediate value

OPCODE

k (literal)

k = 11-bit immediate value

General

CALL

and GOTO instructions only

Field

Description

Working register (accumulator)

Bit address within an 8-bit file register

Literal field, constant data or label

Don’t care location (= 0 or 1).

The assembler will generate code with x = 0.

It is the recommended form of use for com-

patibility with all Microchip software tools.

Destination select; d = 0: store result in W,

d = 1: store result in file register f.

Default is d = 1.

label

Label name

TOS

Top-of-Stack

Program Counter

PCLATH

Program Counter High Latch

GIE

Global Interrupt Enable bit

WDT

Watchdog Timer/Counter

Time-out bit

Power-down bit

dest

Destination either the W register or the

specified register file location

[ ]

Options

( )

Contents

→

Assigned to

< >

∈

In the set of

italics

User defined term (font is courier)

Note:

To maintain upward compatibility with

future PIC16CXXX products, do not use

the OPTION and TRIS instructions.

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