ML6461

12

Figure 5. Pixel Synchronization. For Master Mode, Active Edge at Beginning of Horizontal Blanking.

(CBLANK = 0, SENSE_HSYNC = 0) (BL = Blanked Pixel)

Figure 5a. Pixel Synchronization. For Master Mode, Active Edge at Beginning of Horizontal Blanking.

(CBLANK = 0, SENSE_HSYNC = 1) (BL = Blanked Pixel)

CLK

HSYNC (output)

YCrCb

BL

BL

BL

BL

BL

BL

CB0

Y0

CR0

Beginning

of Horizontal

Blanking

Q Clock Cycles

T2T

3T

(0,0)

(0,1)

(1,0)

(1,1)

(0,0) or (0,1) or (1,0) or (1,1) via (SEL_HSYNC1, SEL_HSYNC0)

Y1

# of Clock Cycles, Q

if SELCCIR = 1

if SELCCIR = 0

if ANALOG_HBLANK = 0

if ANALOG_HBLANK = 1

244

214

252

214

CLK

HSYNC

(output)

YCrCb

BL

BL

BL

BL

BL

BL

CB0

Y0

CR0

Y1

Beginning

of Horizontal

Blanking

Q Clock Cycles

# of Clock Cycles, Q

if SELCCIR = 1

if SELCCIR = 0

if ANALOG_HBLANK = 0

if ANALOG_HBLANK = 1

T2T

3T

(0,0)

(0,1)

(1,0)

(1,1)

(0,0) or (0,1) or (1,0) or (1,1) via (SEL_HSYNC1, SEL_HSYNC0)

244

214

252

214