REV. 0

ADP3164

–10–

current. The current comparator of the ADP3164 has a mini-

mum current limit threshold of 143 mV. Note that the 143 mV

value cannot be used for the maximum specified nominal cur-

rent, as headroom is needed for ripple current and tolerances.

The current comparator threshold sets the peak of the inductor

twice the peak inductor current value less half of the peak-to-

peak inductor ripple current. From this, the maximum value of

R

V

I

n

I

mV

AA

m

SENSE

CSCL MIN

O

L RIPPLE

()

()

.

.

2

143

80

4

10 8

2

56

(3)

In this case, 5 m

was chosen as the closest standard value.

the maximum current sense threshold of 173 mV:

In

V

R

nI

I

mV

m

A

A

OUT CL

CSCL MAX

SENSE

L RIPPLE

OUT CL

()

()

(

)

()

.

.

2

4

173

5

410 8

2

116 8

(4)

At output voltages below 750 mV, the current sense threshold is

reduced to 108 mV, and the ripple current is negligible. There-

fore, at dead short the output current is reduced to:

In

V

R

mV

m

A

OUT SC

CS SC

SENSE

()

()

.

4

108

5

86 4

(5)

To safely carry the current under maximum load conditions, the

sense resistor must have a power rating of at least:

PI

R

R

SENSE RMS

SENSE

SENSE

()

2

(6)

where:

I

I

n

V

V

SENSE RMS

O

OUT

IN

()

2

2

(7)

In this formula, n is the number of phases, and

is the con-

verter efficiency, in this case assumed to be 85%. Combining

Equations 6 and 7 yields:

P

AV

V

mW

80

4

1 475

085 12

51 2

2

.

.

.

Output Resistance

This design requires that the regulator output voltage measured

at the CPU drop when the output current increases. The speci-

fied voltage drop corresponds to a dc output resistance of:

R

VV

I

VV

A

m

OUT

ONL

OFL

O

1 4605

1 3845

80

095

..

.

(8)

The required dc output resistance can be achieved by terminating

tion resistance that will yield the correct dc output resistance:

R

nR

ng

R

m

mmho

m

k

T

I

SENSE

m

OUT

12 5 5

42 2

0 95

748

.

..

.

(9)

of phases.

Output Offset

Intel’s VRM 9.1 specification requires that at no load the nominal

output voltage of the regulator be offset to a lower value than the

nominal voltage corresponding to the VID code to make sure that

circuit tolerances never cause the output voltage to exceed the

VID value. The offset is introduced by realizing the total termina-

the REF pin and ground. The resistive divider introduces an

voltage near its allowed maximum at light load. Furthermore, the

At no load, the current sense threshold is increased by the peak of

the ripple current in the inductor and reduced by the delay between

sensing when the current threshold has been reached and when

the high side MOSFET actually turns off. These two factors are

VV

IR

n

VV

L

nt

R

n

VV

Am

V

V

nH

ns

m

V

GNL

GNL

L RIPPLE

SENSE

I

IN

OUT

D

SENSE

I

GNL

0

2

1

10 8

5

12 5

2

12

1 475

600

4

60

5

12 5

1 074

()

..

.

..

(10)

can now be calculated, assuming that the internal resistance of

R

V

VV

R

gV

V

R

V

VV

k

mmho

V

V

k

B

REF

REF

GNL

T

m

ONL

VID

B

()

.

.

.

( ..

)

.

3

3

1 074

748

2 2

1 4605

1 475

10 37

(11)

R

RR

R

k

M

k

k

A

T

OGM

B

1

11

1

1

1

748

1

1

1

10 5

26 7

..

.

(12)

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