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ADP3164RUZ-R71 数据表(PDF) 14 Page - ON Semiconductor |
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ADP3164RUZ-R71 数据表(HTML) 14 Page - ON Semiconductor |
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14 / 15 page ![]() ADP3164 13. Whenever a power dissipating component (e.g., a power MOSFET) is soldered to a PCB, the liberal use of vias, both directly on the mounting pad and immediately sur- rounding it, is recommended. Two important reasons for this are: improved current rating through the vias, and improved thermal performance from vias extended to the opposite side of the PCB where a plane can more readily transfer the heat to the air. 14. The output power path, though not as critical as the switch- ing power path, should also be routed to encompass a small area. The output power path is formed by the current path through the inductor, the current sensing resistor, the out- put capacitors, and back to the input capacitors. 15. For best EMI containment, the power ground plane should extend fully under all the power components except the out- put capacitors. These components are: the input capacitors, the power MOSFETs and Schottky diodes, the inductors, the current sense resistor, and any snubbing element that might be added to dampen ringing. Avoid extending the power ground under any other circuitry or signal lines, including the voltage and current sense lines. Signal Circuitry 16. The output voltage is sensed and regulated between the FB pin and the GND pin (which connects to the signal ground plane). The output current is sensed (as a voltage) by the CS+ and CS– pins. In order to avoid differential mode noise pickup in the sensed signal, the loop area should be small. Thus the FB trace should be routed atop the signal ground plane, and the CS+ and CS– pins (the CS+ pin should be over the signal ground plane as well). 17. The CS+ and CS– traces should be Kelvin-connected to the current sense resistor, so that the additional voltage drop due to current flow on the PCB at the current sense resistor connections, does not affect the sensed voltage. Rev. 2 | Page 14 of 15 | www.onsemi.com |
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