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ASM1232LPF 数据表(PDF) 4 Page - ON Semiconductor |
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ASM1232LPF 数据表(HTML) 4 Page - ON Semiconductor |
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4 / 12 page ![]() ASM1232LP, ASM1232LPS http://onsemi.com 4 Table 3. DC ELECTRICAL CHARACTERISTICS (Unless otherwise stated, 4.5 V ≤ VCC ≤ 5.5 V and over the operating temperature range of 0°C to 70°C (−40°C to +85°C. for N devices). All Voltages are referenced to ground.) Parameter Symbol Conditions Min Typ Max Unit Supply Voltage VCC 4.5 5.5 V ST and PBRST Input High Level VIH 2 VCC + 0.3 V ST and PBRST Input Low Level VIL −0.3 0.8 V VCC Trip Point (TOL = GND) VCCTP 4.50 4.62 4.74 V VCC Trip Point (TOL = VCC) VCCTP 4.25 4.37 4.49 V Watchdog Timeout Period tTD TD = GND 62.5 150 250 ms Watchdog Timeout Period tTD TD = VCC 500 1200 2000 ms Watchdog Timeout Period tTD TD Floating 250 610 1000 ms Output Voltage VOH I = −500 mA (Note 4) VCC − 0.5 VCC − 0.1 V Output Current IOH Output = 2.4 V (Note 3) −8 −10 mA Output Current IOL Output = 0.4 V 10 mA Input Leakage IIL (Note 2) −1.0 1.0 mA RESET Low Level VOL (Note 4) 0.4 V Internal Pull−up Resistor (Note 2) 40 kW Operating Current (CMOS) ICC1 30 mA Input Capacitance CIN 5 pF Output Capacitance COUT 10 pF PBRST Manual Reset Minimum Low Time tPB PBRST = VIL 20 ms Reset Active Time tRST 250 610 1000 ms ST Pulse Width tST (Note 5) 20 ns VCC Fail Detect to RESET or RESET tRPD 5 8 ms VCC Slew Rate tF 4.75 V to 4.25 V 300 ms PBRST Stable LOW to RESET and RESET Active tPDLY 20 ms VCC Detect to RESET or RESET inactive tRPU tRISE = 5 ms 250 610 1000 ms VCC Slew Rate tR 4.25 V to 4.75 V 0 ns 2. PBRST is internally pulled HIGH to VCC through a nominal 40 kW resistor. 3. RESET is an open drain output. 4. RESET remains within 0.5 V of VCC on power−down until VCC falls below 2 V. RESET remains within 0.5 V of ground on power−down until VCC falls below 2.0 V. 5. Must not exceed the minimum watchdog time−out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be strobed. |
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