CS5307GDWR24 datasheet(22/24 Pages) ONSEMI

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Figure 28. VDRP Tuning Waveforms. The RC Time

Constant of the Current Sense Network Is Optimal:

VDRP and VOUT Respond to the Load Current Quickly

Without Overshooting.

Figure 29. The Value of CAMP Is Too High and the

Loop Gain/Bandwidth Too Low. COMP Slews Too

Slowly Which Results in Overshoot in VOUT.

For resistive current sensing, choose the current sense

network (RCSx, CCSx, x = 1, 2, 3, or 4) to satisfy

RCSx @ CCSx + Lo (Rsense)

(33)

This will provide an adequate starting point for RCSx and

CCSx. After the converter is constructed, the value of RCSx

(and/or CCSx) should be fine−tuned in the lab by observing

the VDRP signal during a step change in load current. Tune

the RCSx ⋅ CCSx network to provide a “square−wave” at the

VDRP output pin with maximum rise time and minimal

overshoot as shown in Figure 28.

8. Error Amplifier Tuning

After the steady−state (static) AVP has been set and the

current sense network has been optimized, the Error

Amplifier must be tuned. The gain of the Error Amplifier

should be adjusted to provide an acceptable transient

response by increasing or decreasing the Error Amplifier’s

feedback capacitor (CAMP in the Applications Diagram).

The bandwidth of the control loop will vary directly with the

gain of the error amplifier.

If CAMP is too large, the loop gain/bandwidth will be low,

the COMP pin will slew too slowly and the output voltage

will overshoot as shown in Figure 29. On the other hand, if

CAMP is too small, the loop gain/bandwidth will be high, the

COMP pin will slew very quickly and overshoot will occur.

Integrator “wind up” is the cause of the overshoot. In this

case, the output voltage will transition more slowly because

COMP spikes upward as shown in Figure 30. Too much loop

gain/bandwidth increases the risk of instability. In general,

one should use the lowest loop gain/bandwidth possible to

achieve acceptable transient response. This will insure good

stability. If CAMP is optimal, the COMP pin will slew

quickly but not overshoot and the output voltage will

monotonically settle as shown in Figure 32.

After the control loop is tuned to provide an acceptable

transient response, the steady−state voltage ripple on the

COMP pin should be examined. When the converter is

operating at full steady−state load, the peak−to−peak voltage

ripple (VPP) on the COMP pin should be less than 20 mVPP

as shown in Figure 31. Less than 10 mVPP is ideal. Excessive

ripple on the COMP pin will contribute to jitter.

9. Current Limit Setting

When the output of the current sense amplifier (COx in the

block diagram) exceeds the voltage on the ILIM pin, the part

will enter hiccup mode. For inductive sensing, the OCSET

pin voltage should be set based on the inductor’s maximum

resistance (RLMAX). The design must consider the

inductor’s resistance increase due to current heating and

ambient temperature rise. Also, depending on the current

sense points, the circuit board may add additional resistance.

In general, the temperature coefficient of copper is +0.39%

per

_C. If using a current sense resistor (RSENSE), the

OCSET pin voltage should be set based on the maximum

value of the sense resistor. To set the level of the OCSET pin:

Figure 30. The Value of CAMP Is Too Low and the

Loop Gain/Bandwidth Too High. COMP Moves Too

Quickly, Which Is Evident from the Small Spike in Its

Voltage When the Load Is Applied or Removed. The

Output Voltage Transitions More Slowly Because of

the COMP Spike.

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